DAC 2011 Trip Reports – Mostly Transistor Level Tools

2011 was the year of the foundry (TSMC, Globalfoundries, Samsung) at DAC in San Diego. The foundries had bigger booths, bigger events, were on more panel sessions, and had more marketing influence than any other year that I can remember.

The attendance numbers from EDAC suggest a modest increase in EDA vendors and total attendees for 2011 compared to 2010, ironically the EDAC web site doesn’t even have their own Press Release posted yet after 8 days (did you all go on vacation after DAC?).

Enjoy reading my trip reports.

• Sunday Night at DAC
• Magma, ARM, Globalfoundries
• Nimbic (formerly Physware) – 3D Field Solver in the Cloud or Desktop
• FineSim adds RF analysis and Tcl Circuit Checks
• IPL Alliance focuses on iPDKs and Analog Constraints
• Physical IP group at ARM
• Tanner EDA at DAC
• Extreme DA at DAC
• Synopsys IC Validator
• Circuit Simulation and IC Layout update from Mentor
• DRC tool guns for Calibre at DAC
• An Affordable 3D Field Solver
• Hardware Configuration Management at DAC
• Circuit Simulation Update from Cadence at DAC
• Reduced IC Leakage at DAC
• Cadence Spinout at DAC
• RLCK Reduction Tool at DAC
• Ciranova Update at DAC
• EDA Interoperability at DAC
• One Trillion Transistor IC Layout at DAC
• Berkeley Design Automation at DAC
• Blue Pearl at DAC
• Synopsys, ARM, Samsung, Globalfoundries (Part 1)
• Synopsys, ARM, Samsung, Globalfoundries (Part 2)
• CyberEDA Adds a Transistor-level Debugger
• QuickCap for IC Extraction at DAC
• HSPICE gets Faster, better Convergence

If you went to DAC, then what did you think of the technical conference, exhibits, keynotes and panel discussions?

Tags: 48DAC, 48th DAC, DAC 2011, Daniel Payne, Marketing EDA, San Diego

This entry was posted on Friday, June 17th, 2011 at 7:18 pm. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.