Three nanoelectronics powerhouses shared their roadmaps and future views at their respective events: Intel Investor Meeting (May 8 in Santa Clara), Samsung Foundry Forum (May 14 in Santa Clara), and Imec Technology Forum (May 14 in Antwerp, Belgium). Many more news this week concern several different areas, as described below; among them, the release of a new report from IC Insights, showing that in 2018 Texas Instruments maintained its place as the world’s leading supplier of analog chips.

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Developers conferences from three of the major global IT heavyweights took place in a mere ten-day timeframe: Facebook “F8” from April 30th to May 1st in San Jose; “Microsoft Build” from May 6th to May 8th in Seattle; and “Google I/O” from May 7th to May 9th in Mountain View. Each of these events brought a plethora of announcements, and – as distant as they may seem from chip design and manufacturing – some of them will inevitably have an impact well beyond the developers’ communities of these three companies.

Early May announcements overload

Just a brief, non-exhaustive summary. Pledging to “a privacy-focused social platform”, Facebook introduced many new functions across all its apps and products, including Instagram, WhatsApp, Messenger and AR/VR. The Facebook app itself will get a new design, new group-oriented features, and a match-making function called Secret Crush aimed at exploring relationship opportunities within a circle of friends – without risking an embarrassing moment: the two persons will be notified only if both express interest for each other. WhatsApp news include the possibility for people to see a business catalog right within the app when chatting with a business; Instagram users will be able to simply tap on their smartphone screen to know exactly what ‘creators’ are wearing and buy the same outfit on the spot; “Portal from Facebook” and Portal+ will expand in Europe this fall; and Facebook’s two newest virtual reality headsets — Oculus Quest and Oculus Rift S — will start shipping May 21.

Mark Zuckerberg at F8. Image credit: Facebook

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First quarter results confirm the expectation of “headwinds” expressed by SEMI at a recent event. Second quarter now starts with many hot topics and promising innovations – from design to manufacturing.

Wafer and chip sales down in Q1 2019

According to the SEMI Silicon Manufacturers Group, worldwide silicon wafer area shipments dropped 5.6 percent during the first quarter of 2019 compared to the fourth quarter of 2018 and are now at their lowest level since the fourth quarter of 2017. A bigger downturn has been reported by the Semiconductor Industry Association (SIA): worldwide sales of semiconductors totalled $96.8 billion during the first quarter of 2019, a decrease of 15.5 percent over the previous quarter and 13 percent less than the first quarter of 2018. Global sales for the month of March 2019 were $32.3 billion, a dip of 1.8 percent compared to the previous month's total and 13 percent less than sales from March 2018.

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The EDA industry is in good shape: according to a report from Reportlinker, the Electronic Design Automation market is expected to grow at a CAGR of 12.0% over the next eight years, reaching US$28.27 billion by 2027. Recent industry news include TSMC granting certifications for its System-on-Integrated-Chips stacking technology (TSMC-SoIC) to Ansys, Cadence, Mentor and Synopsys.

Microsoft and Intel acquiring specialized companies

IoT and AI are the two drivers behind the recent acquisitions from Microsoft and Intel respectively. The software giant has acquired Express Logic, a leader in real time operating systems (RTOS) for IoT and edge devices powered by microcontrollers. Express Logic’s ThreadX RTOS has over 6.2 billion deployments, making it one of the most deployed RTOS in the world. With this acquisition, Microsoft aims to grow the number of devices connected to its cloud computing service Azure and will enable new intelligent capabilities. Microsoft’s goal is to make Express Logic’s ThreadX RTOS available as an option for real time processing requirements on an Azure Sphere device and enable ThreadX-powered devices to connect to Azure IoT Edge devices when the IoT solution calls for edge computing capabilities.

Intel has acquired Omnitek, a UK-based provider of video and vision FPGA IP solutions. Omnitek’s technology is clearly a complement to Intel’s FPGA business: last week, for example, Omnitek announced availability of a new Convolutional Neural Network optimized for the Intel Arria 10 GX architecture, claiming world-leading performance per watt (135 GOPS/W) at full 32-bit floating point accuracy. The design employs a new framework combining fixed point and floating point maths.

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The five nanometer process node is here: on April 15, Samsung announced that its 5nm FinFET process technology – based on extreme ultraviolet lithography – is complete in its development and is now ready for customers’ samples. Compared to 7nm, the new process provides up to a 25 percent increase in logic area efficiency with 20 percent lower power consumption or 10 percent higher performance, still allowing reuse of all the 7nm intellectual property.

Object-based data compression

But advancing electronics is not just about scaling down to the next process node; research shows that many important aspects of data processing offer significant optimization opoortunities. Among them is data compression, aimed at reducing the frequency and amount of data fetched from main memory. In a paper presented at the ACM International Conference on Architectural Support for Programming Languages and Operating Systems this week, researchers from the Massachusetts Institute of Technology describe the first approach to compress ‘objects’ across the memory hierarchy, matching the characteristics of object-oriented programming. As MIT explained in a news release, traditional compression techniques operate on fixed-size chunks of data, and therefore handle objects poorly. The researchers overcame this limitation through their prior work that reorganizes the memory architecture to directly manipulate objects, as opposed to traditional cache-based structures. The new technique uncovers more compression opportunities as it leverages redundancy across objects, while the traditional ones were limited to finding redundancy within each fixed-size block. In experiments using a modified Java virtual machine, the new technique compressed twice as much data and reduced memory usage by half over traditional cache-based methods.
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Over the last couple of weeks, several announcements confirmed the ever-growing interest for artificial intelligence. In the same timeframe, other significant news concerned video technologies, new solutions to deal with reliability issues, and acquisitions of semiconductors companies.

Intel investing in AI startups

Intel is obviously very active in the AI arena, with initiatives focusing on specialized companies and startups. Among them a collaboration with H2O.ai, a company that has created an open source machine learning platform. The first phase of this project focuses on accelerating H2O.ai technologies on Intel platforms, including the new second generation Intel Xeon Scalable processors. According to H2O, using the latest Intel platform has enabled to handle much larger data sets and drastically reduce training time, while allowing server consolidations. And four AI startups recently joined the Intel Capital portfolio: among them, SambaNova Systems (Palo Alto, CA) and Untether AI (Toronto, Canada). The Intel Capital investment in SambaNova is part of a $150M Series B funding round with additional participation from GV (formerly Google Ventures) and others. Founded by two Stanford professors, SambaNova is building an advanced systems platform to run artificial intelligence applications from the datacenter to the edge, with a ‘software-defined hardware’ approach that allows to leverage constantly-evolving software advances in real time, to further maximize hardware performance. The Canadian startup Untether AI received $13 million in Series A funding from Intel Capital and other investors. It is developing a new AI chip for neural net inference based on a ‘near-memory’ design, that eliminates the data movement bottleneck that costs energy and performance in traditional architectures. According to the company, the new architecture gets data to the processors at 2.5 petabits per second.

Leaders from the 14 companies joining the Intel Capital portfolio pose with Intel Capital President Wendell Brooks. (Credit: Intel Corporation)

Chinese AI companies attracting attention

The other two AI startups on which Intel Capital has invested are both Chinese: Cloudpick Limited (Shanghai, China), a smart retail technology provider; and Zhuhai EEasy Technology (Zhuhai, China), an AI system-on-chip design house and total solution provider. Another Chinese AI company making news recently is FABU Technology, that announced its coarse-grained Deep Learning Accelerator (DLA), a low power custom module that improves the performance of object recognition and image classification in convolutional neural networks. The DLA can be customized for a broad range of models, including the computation of high data volumes from cameras and sensors to enable high-performance object detection for self-driving vehicles. According to FABU, this DLA design presents high inference performance comparable to high-end GPUs, but with about 40x power consumption reduction. The FABU DLA test chip is manufactured with TSMC 28nm CMOS technology. The proposed DLA 2.0 is projected to perform object detection at more than 40 frames per second for 2MP (1920 x 1080) images. The power consumption of the entire SoC is expected to be 5 W.

Broadcast video gets new compression algorithms and new video-over-IP solutions

Artificial intelligence is in the spotlight, but other applications are quickly evolving as well. Among them is broadcast video, with innovations such as High Dynamic Range and ever-increasing definition. Due in part to the recent NAB show, several announcements over the past couple of weeks have involved new FPGA-based solutions for compressing video and for transporting it over IP networks. The Belgian company intoPIX, who co-develop the new video compression standard JPEG-XS, announced the release of their first JPEG-XS IP-cores for Intel and Xilinx FPGAs, and demonstrated a SDK that will accelerate JPEG-XS encoding and decoding for live production. The new SDK will offer sub-frame latency and bandwidth ranging from 125Mbps to 400Mbps for HD, from 500Mbps to 1.6Gps for 4K, and from 1Gbps to 4Gbps for 8K. According to the company, JPEG-XS is set to become the go-to solution for broadcast professionals that want to create bandwidth-efficient production workflows over IP networks. Other video-related news include Nextera Video and Adeas announcing that their ST2110 Video Over IP FPGA cores now support NMOS (Networked Media Open Specifications) IS-08 Audio Channel Mapping; V-Nova and NGCodec presenting their combined FPGA-based encoding solution, which claims great UHD video quality and encoding efficiency resulting in up to 50x cost savings when compared to traditional CPU software options; and Omnitek, a FPGA IP vendor, offering a 3D LUT for color space conversions and conversion between nonlinear gamuts, for applications such as ITU-R Recommendations 709/2020 and SDR/HDR conversions, chroma keying and artistic effects.

The intoPIX team who co-developed the JPEG-XS standard. (Credit: intoPIX)

Reliability insights from Israel

Reliability is set to become the number one requirement in future autonomous driving cars. In the meantime, two recent announcements suggest measures that can be taken on this front today – at chip level and system level respectively. ProteanTecs, an Israeli start-up company that invented an innovative solution for the prediction of failures in electronics, announced that it has completed a series B financing round of $35 million. The company developed a solution called Universal Chip Telemetry, a new language of inferred measurements for chip health and performance monitoring. The ProteanTecs solution uses a cloud-based platform combining data derived from proprietary agents embedded in chips, with machine learning and data analytics. This significantly improves chip and system production quality, while tracking operational reliability and alerting on faults before they become failures. A system-level proposal comes from the components distributor Digi-Key Electronics and the Israeli company BQR Reliability Engineering: the two partners presented a collaboration that will enable Digi-Key customers to easily compare different BOMs (Bill of Materials) from the point of view of MTBF (Mean Time Between Failures). The BQR's software solution, available in SaaS mode, makes sure the design meets the reliability goal early in the design process before manufacturing. With Pareto reports showing the most unreliable components, it will ensure the selection of components that balance reliability and cost. It will also provide measures for warranty analysis, design reviews, tenders, product datasheets, and design trade-offs.

Industrial and automotive applications spur acquisitions

Also over the last couple of weeks, two important acquisitions took place: Renesas acquired Integrated Device Technology (a historical Silicon Valley company, founded in 1980), and ON Semiconductor reached an agreement to acquire Quantenna. In both cases, one of the major goals of the acquisitions is a stronger offering in industrial and automotive markets. Renesas will now deliver a range of embedded solutions combining its microcontrollers, system-on-chips and power management ICs, with IDT’s RF, timing, memory interface, real-time interconnect, optical interconnect, wireless power and smart sensors. ON Semiconductor and Quantenna aim at low-power connectivity applications by combining ON’s expertise in highly efficient power management with Quantenna’s Wi-Fi technologies and software expertise.

After a 33-year incubation, EUV lithography is finally ready for volume production: Samsung and TSMC will start using this technology to process more than 1,000 wafers per day – at 7 nanometers – during 2019. The announcement came from ASML – the Dutch company that developed the EUV lithography equipment – on occasion of the European “Industry Strategy Symposium” organized by SEMI, the global industry association representing the electronics manufacturing supply chain. This year the event took place in Milan, Italy, March 31^st to April 2^nd, and offered a picture of the challenges and opportunities facing the semiconductor industry in Europe.

Back to single patterning

Peter Jenkins from ASML summarized the long run that lead to EUV lithography, starting from the early researches in 1986 when this wavelength band was called “soft X-rays” – it was then re-branded “extreme ultraviolet” in 1993. A major boost came from the co-development agreement signed in 2012, when Intel, Samsung and TSMC joined ASML to provide additional resources. But a key piece of the puzzle was still missing to reach full scale productivity: a powerful EUV source. This roadblock was removed in 2013, when ASML acquired its EUV source supplier – Cymer – to help R&D on this front. Now, with 250-watt sources available, everything is in place. Jenkins stressed that EUV lithography allows to use single patterning even for the most advanced process nodes, thus reducing the manufacturing cost that has soared over the past few years due to double- and quadruple-patterning.
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Juergen Bortolazzi. © DATE 2019

Risking to miss your flight? Save time at the airport by letting your car find a parking place by itself. Much like valet parking, but without a valet. This is the goal of a project from the Volkswagen Group, that Jürgen Bortolazzi from Porsche described in his opening keynote at the DATE Conference – which took place in Florence, Italy, March 25^th to 29^th.

Autonomous driving was one of the key themes at the European event on design and test this year, and it echoed on many other speeches and debates during the conference. Bortolazzi observed that there is a gap between the current SAE level of driving automation, L2 (ADAS systems) and the next level L3 (real autonomous drive), therefore he predicted an intermediate level L2+ with more advanced ADAS. But getting to L3, he pointed out, will require major reductions in cost and power consumption. Autonomous drive takes a huge number of expensive sensors, and such a big amount of on-board processing power that – with the current technologies – car electronics might require water cooling. Bortolazzi also highlighted that China is very well positioned in the quest for autonomous driving, thanks to a comprehensive plan from the Chinese government that includes a regulation framework.

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Market research firms released new reports this week offering outlooks on three key industries; among them EDA, where Synopsys is making news with several announcements. Also, recent or upcoming conferences and trade shows are attracting attention on AI acceleration in servers, SMPS design and architectures, new battery technologies.

More 300mm wafer fabs as foundries slow down and EDA market grows

The worldwide number of operational 300mm wafer fabs is expected to climb to 121 this year and grow to a total of 138 fabs in 2023, according to a report recently released by IC Insights. As of today, however, this growing manufacturing capacity is being confronted by a slowing foundry business, as TrendForce points out in its newest research report. Foundries face a severe challenge in 1Q19, with global production revenue expected to decline by around 16% compared to the same quarter 2018, arriving at 14.6 billion USD. TSMC, Samsung and GlobalFoundries take first, second and third place respectively in market shares. According to TrendForce, although TSMC's market share reaches 48.1%, the foundry suffers a near 18% decline in year-on-year growth.

EDA, instead, will continue to grow at a significant pace: a recent report from ResearchAndMarkets.com values the global electronic design automation tools market at USD 9.76 billion in 2018 and predicts this figure to reach USD 17.35 billion by 2024 – with a forecasted CAGR of 10.1% during the period of 2019-2024.

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Three recent and unrelated events confirm the ever-growing importance of the technologies and architectures used to connect processing elements at all levels – within a chip, among chips, within a datacenter. Other significant announcements made over the past few days concern the growing RISC-V ecosystem; the first Arm Neoverse system development platform on TSMC 7nm process technology; and EDA/T&M vendors getting ready for USB4.

Bit Traffic

On March 11, the GPU vendor Nvidia announced the acquisition of Mellanox, a key player in high-performance interconnect technologies. With this acquisition, Nvidia aims at optimizing datacenter-scale workloads across the entire computing, networking and storage stack to achieve higher performance, greater utilization and lower operating cost. According to Nvidia, datacenters in the future will be architected as giant compute engines with tens of thousands of compute nodes, designed holistically with their interconnects for optimal performance. Hence the strategic importance of joining forces with Mellanox.

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