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Archive for November 13th, 2024

Shifting left software development; advancements in car power architectures; Japan’s semiconductor subsidies; ADI acquires Flex Logix

Wednesday, November 13th, 2024

Let’s start with a quick geopolitical update: Vietnam is emerging as a destination for new semiconductor-related investments. According to press reports, Foxconn intends to step up its presence in the country to produce integrated circuits, and multiple players – both foreign and domestic companies – are expanding capacity in Vietnam for chip testing and packaging.

EDA updates

Siemens Digital Industries Software has added the Innexis product suite to its Veloce hardware-assisted verification and validation system, to address demand for shift-left software development in the design process of complex SoCs. Currently, the Innexis product suite consists of: Innexis Developer Pro, which provides a connected development flow from virtual to hybrid to full RTL; Innexis Architecture Native Acceleration, a cloud-based high-speed virtual platform; Innexis Virtual System Interconnect, to facilitate the creation and simulation of comprehensive system level digital twin platforms by connecting multi-behavioral virtual and physical subsystems.

Altair PollEx for ECAD, a PCB verification tool, is now available as a one-year free trial. The tool enables engineers – early in the design cycle – to review designs, analyze, verify, and assess physical, logical, and electrical attributes, and detect potential manufacturing and electrical issues. It can also boost production yield with ECAD integration, and ensure collaboration throughout the PCB development process. Altair PollEx for ECAD integrates with major PCB design tools like the ones from Altium, Cadence, Siemens, and Zuken.

CelusAI-driven automation has been integrated with Siemens’ PCB design solutions, enabling a workflow that automates routine design tasks like schematic generation. This cooperation aims at enhancing accessibility and efficiency in PCB design for small to medium-sized businesses and independent engineers.

Excellicon has re-engineered its core timing graph engine to address the performance requirements of timing constraints generation and verification in complex SoC designs, characterized by a surge in gate count and the proliferation of clock domains. According to the company, its newly developed Hyper-Graph technology delivers a 3X-5X run time speed improvement over the nearest competitor.

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