AI agents in EDA; new AMD MI325X AI accelerator; low-power alternative to FP multiplication; China’s mature node production

Let’s start by paying tribute to SpaceX’s engineering prowess: those who missed the incredible images of the Super Heavy booster rocket getting back on the launch pad – and then getting caught up by the launch tower – might want to catch up by watching this video from Bloomberg.

ChipAgents: adding AI agents to existing EDA flows

California-based startup Alpha Design has introduced ChipAgents, an artificial intelligence solution (an “AI agent”) meant to be added to existing EDA flows. According to the company, ChipAgents enables designers to transform their concepts into precise design specifications using simple language prompts; analyzes and generates RTL design specs and code; auto-completes Verilog; automates the creation of testbenches; and, through real-time learning from simulations, it autonomously verifies and debugs design code.

New AMD Instinct MI325X accelerator challenging Nvidia H200

On occasion of its “Advancing AI” 2024 event, AMD announced its latest accelerator and networking solutions: the Instinct MI325X accelerators, the Pensando Pollara 400 NIC and the Pensando Salina DPU. According to the company, the Instinct MI325X accelerators deliver industry-leading memory capacity and bandwidth, with 256GB of HBM3E supporting 6.0TB/s, offering 1.8X more capacity and 1.3x more bandwidth than the Nvidia H200. The AMD Instinct MI325X also offers 1.3X greater peak theoretical FP16 and FP8 compute performance compared to Nvidia H200. This translates into up to 1.3X the inference performance on Mistral 7B at FP16, 1.2X the inference performance on Llama 3.1 70B at FP8 and 1.4X the inference performance on Mixtral 8x7B at FP16 of the H200. Besides introducing new chips, AMD has also confirmed it continues to invest in its ROCm open software stack for AI.

Wolfspeed to receive CHIPS Act funding

The U.S. Department of Commerce and Wolfspeed have signed a non-binding preliminary memorandum of terms for up to $750 million in proposed direct funding under the CHIPS and Science Act. In addition, a consortium of investment funds has agreed to provide Wolfspeed an additional $750 million of new financing, and Wolfspeed expects to receive $1 billion of cash tax refunds under the CHIPS and Science Act. The company, in total, will have access to up to $2.5 billion of expected capital to support the expansion of silicon carbide manufacturing in the United States.

FPGAs and PLDs updates: Achronix, Texas Instruments

Achronix has announced the availability and shipment of its latest mid-range FPGA, the AC7t800. The new device is designed to address high-throughput, low-latency applications, including 5G (and coming 6G) infrastructure, cloud networking, and data center acceleration.​ According to the company, the AC7t800 delivers the highest level of performance of any mid-range FPGA available in the market today. Features of the new device include 2D network-on-chip with 12 Tbps of bandwidth; a 32×32 bit machine learning processors fracturable to 4×4 bit (INT and FP); 112 Gbps SerDes (24 channels); 400G Ethernet (2 channels); PCIe Gen5×16; 1.86 Tbps of external memory bandwidth.

Texas Instruments’ new PLD portfolio aims to extend the benefits of programmable logic to applications that require simpler devices, simpler programming and smaller packages. The new family includes what TI claims is the industry’s smallest leaded package across all markets, measuring 2.1mm by 1.6mm with a 0.5mm pitch. According to TI, this leaded package is 92% smaller than competing devices; the company also maintains that its automotive-grade PLDs are 63% smaller than their closest competitors. Other distinctive features of the new TI PLDs include quiescent current less than 1µA and 50% less active power than similar devices on the market. Device simulation and configuration are performed through TI’s InterConnect Studio tool, without the need for any software coding.

IoT partnerships: SensiML-Efabless, Silicon Labs-Kudelski

SensiML and Efabless have announced a partnership addressing the high cost and complexity of building optimized, application-specific AI at the edge, in IoT systems. The combined solution being offered to developers leverages the new Efabless’s Risc-V-based SoC design platform, “chipIgnite ML”, and SensiML’s open-source Piccolo AI AutoML toolchain. According to the two companies, this combination opens doors to sophisticated edge AI solutions that were previously out of reach for many developers, with a 10x improvement in power efficiency and performance compared to microcontrollers with general-purpose Neural Processing Units.

Silicon Labs, in partnership with Kudelski IoT, has introduced a new solution to accelerate the time to market for Matter-certified IoT devices. The collaboration integrates Kudelski IoT’s Matter Device Attestation Certificates (DAC) into Silicon Labs’ Custom Part Manufacturing Service (CPMS), simplifying the process – which is based on the Zero Trust security approach – for IoT device makers.

Cutting AI energy by replacing multiplication with addition

A company called BitEnergy AI (Cambridge, MA) has recently authored a paper proposing a solution that promises dramatic energy reduction in AI acceleration. The researchers observed that large neural networks spend most computation on floating point tensor multiplications, and found that a floating point multiplier can be approximated by one integer adder with high precision. Therefore, they propose a linear-complexity multiplication (L-Mul) algorithm that approximates floating point number multiplication with integer addition operations. According to the team, applying the L-Mul operation in tensor processing hardware can potentially reduce 95% energy cost by elementwise floating point tensor multiplications and 80% energy cost of dot products.

Further reading

According to think tank Ifri (French Institute of International Relations), fears concerning China’s mature node overcapacity are unfounded. In a 15-page article, Arrian Ebrahimi maintains that “China is decoupling from, not flooding, the global mature-node semiconductor market. As China increasingly pursues industrial policies encouraging domestic chip production, its own growing chip demand will prevent a direct flood of cheap Chinese chips on foreign shores. However – the author points out – as Beijing achieves its goal of decreasing the reliance of domestic downstream manufacturers on foreign chips, European and American mature-node semiconductor companies will feel the ripple effects of an increasingly ‘involuted’ Chinese chip ecosystem.”

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