Let’s start by briefly mentioning two U.S. CHIPS Act updates. Polar Semiconductor will receive up to $123 million in direct funding to expand and modernize the company’s manufacturing facility in Bloomington, Minnesota. The investment is expected to nearly double the U.S. production capacity of sensor and power chips. The U.S. government has also launched the National Semiconductor Technology Center’s (NSTC) Workforce Center of Excellence (WCoE), with an expected $250 million investment over ten years, to support education programs that address key skills and workforce gaps in the semiconductor industry. The first cohort of awardees consists of the following organizations: American Federation of Teachers Educational Foundation, Idaho Technology Council, Maricopa County Community College District, Rochester Institute of Technology, Texas A&M University, University of California Los Angeles, University of Illinois Urbana-Champaign.
Latest EDA updates from TSMC OIP Forum North America
On occasion of TSMC OIP Forum North America, held in Santa Clara on September 25, the major EDA vendors announced their latest tool certifications and new collaborations with the Taiwanese foundry. In general, tool certifications mainly concern TSMC’s N2 process, and areas of collaboration include backside power delivery for the foundry’s A16 process, 3D packaging, multiphysics simulation, IP, cloud-based EDA and more. Here are the announcements from Ansys, Cadence, Siemens and Synopsys. The agenda of the TSMC event, with abstracts of the presentations, can be found here. Below, two charts summarizing the news from Cadence and Synopsys.
Troubled Intel continues to be in the spotlight, also for the rumors of a gigantic acquisition that analysts deem unlikely. EDA news this week include Synopsys continuing to adjust its market footprint as a consequence of the Ansys acquisition. NAND chips are in the news not just because of new product announcements, but also as a benchmark of China’s manufacturing capabilities in the so-called “chip war” era.
Intel’s CEO message
In a message to Intel employees, company CEO Pat Gelsinger emphasized two recent good news: Intel Foundry will produce an AI fabric chip for AWS using the company’s 18A process – as part of a broader partnership – and Intel as a whole has been awarded up to $3B in direct funding under the CHIPS and Science Act for the U.S. government’s Secure Enclave program, designed to expand the trusted manufacturing of leading-edge semiconductors for the U.S. government. Gelsinger also announced that the company plans to establish Intel Foundry as an independent subsidiary inside of Intel, completing the process initiated earlier this year when the company separated the P&L and financial reporting for Intel Foundry and Intel Products. As for the new fabs, Gelsinger said that the company will pause its projects in Poland and Germany by approximately two years based on anticipated market demand.
According to Reuters, Qualcomm has in recent days approached Intel to explore a potential acquisition of the troubled chipmaker. Qualcomm CEO Cristiano Amon would be personally involved in the negotiations, however the San Diego-based company has not made a formal offer for Intel. The Reuters report points out that it’s not clear how Qualcomm, which has a market value of $188 billion, would finance a bid for Intel, which is valued at $122 billion, including its debt, and how it would handle the takeover of Intel Foundry.
Just a quick update somewhat related to the Intel situation, before moving to this week’s news roundup. According to a Reuters report, Qualcomm has explored the possibility of acquiring portions of Intel’s design business. While being mostly interested in Intel’s client PC design business, Qualcomm would be looking at other design units as well.
Synopsys’ 40 Gbps UCIe IP
Synopsys has announced what it claims is the industry’s first complete UCIe IP solution operating at up to 40 Gbps per pin, supporting both organic substrate and high-density, advanced packaging technologies. Capabilities of the new Synopsys 40G UCIe IP solution include single reference clock; die-to-die link initialization without the need to load the firmware; test and silicon lifecycle management features; support for AXI, CHI chip-to-chip, streaming, PCI Express, and CXL; a pre-verified design reference flow.
Synopsys’ Imaging System Simulator
Synopsys has also announced ImSym (Imaging System Simulator), a virtual prototyping platform for imaging systems, encompassing lenses, sensors, and image signal processors into a comprehensive end-to-end simulation platform. Powered by CODE V and LightTools optical design software, ImSym offers a quantitative end-to-end simulation flow, thus reducing the need for physical prototypes.
After many joys, the stock exchange gave some sorrows to Nvidia on September 3 when the company’ shares reportedly lost 9.5% in what is considered “the deepest ever single-day decline in market value for a U.S. company”. In absolute terms, Nvidia lost $279 billion in market capitalization, an indication – according to some observers – that investors are becoming more cautious about AI technology.
Intel reportedly considering selling Altera
Intel’s troubles inevitably are in the spotlight this week. Let’s quickly recap some of the latest updates, based on Reuters reports. Intel CEO Pat Gelsinger and key executives are expected to present a plan in mid-September to cut unnecessary businesses and revamp capital spending. This plan could include selling Altera – but not Intel Foundry – and pausing or halting the new fab in Magdeburg, Germany. Analysts and investors think Intel will likely be removed from the Dow Jones Industrial Average index, due to the stock’s near 60% decline this year. A Republican senator has asked Gelsinger for more details on Intel’s plans to cut more than 15,000 jobs despite being set to receive nearly $20 billion from the U.S. CHIPS Act. Former Cadence CEO Lip-Bu Tan left the Intel board – where he was sitting – as he grew “frustrated by Intel’s large workforce, its approach to contract manufacturing and its risk-averse and bureaucratic culture.”
GlobalFoundry’s new partnerships
And Lip-Bu Tan gave a keynote address at this year’s GlobalFoundry Technology Summit in Santa Clara. The event was the occasion for announcing GF’s partnerships with Efficient and Finwave. US-based startup Efficient will use GF’s 22FDX process to build its ultra-low-power CPUs. The implementation will also take advantage of 22FDX’s MRAM and Adaptive Body Biasing (ABB) capabilities. According to Efficient, current general-purpose processors are over-designed for generality, with most of their energy consumed by unnecessary internal data movement and instruction control overheads. The Efficient Fabric processor architecture, instead, is based on a dataflow execution model and provides reconfigurable hardware at compile time – promising up to 99% lower DC power without compromising performance. Massachusetts-based Finwave will collaborate with GF to optimize and scale its RF GaN-on-Si enhancement-mode (E-mode) MISHEMT technology to volume production at GF’s 200mm fab in Burlington, Vermont, using the foundry’s 90RFGaN platform. Target applications include power amplifiers in future mobile phones.
