EDA updates; new AI approaches; hi-res thermal mapping; dumb LLMs

Memory-based neural networks and the use of “sparse AI” at the edge are two new AI approaches included in this week’s news roundup. Reasoning failures from LLMs are discussed in our Further Reading section. But first, some EDA updates.

EDA updates: DeFacto, Ansys, Keysight, Synopsys

DeFacto and Arm have developed a joint design flow for Arm-based SoCs, covering the steps from SoC design architecture and exploration down to the generation of RTL and IP-XACT design files. The flow integrates Arm IP Explorer and Defacto SoC Compiler. The generated files are fully compatible with standard RTL2GDS SoC design flows. According to DeFacto, the joint solution significantly reduces the overall design time from specification to an SoC ready for synthesis.

Ansys is collaborating with Supermicro and Nvidia to deliver turnkey hardware, enabling acceleration for Ansys multiphysics simulation solutions. According to Ansys, sizing and configuring the right hardware for multiphysics simulation is a complex task that can significantly impact performance, cost, and productivity. Turnkey, customized hardware solutions with CPUs, GPUs, interconnects, and cooling modules allow engineers to run predictively accurate simulations more efficiently. The testing process revealed accelerations ranging from 4x to 1,600x, for different Ansys tools.

Additionally, Ansys has announced its 2024 R2 release, with improvements on multiple aspects of multiphysics simulations across many industries.

Keysight Technologies has introduced PCIe Designer, a design environment for modeling and simulating the latest PCIe Gen5 and Gen6 systems. Keysight is also improving its EDA platform by adding new features to the existing Chiplet PHY Designer tool. According to the company, Chiplet PHY Designer is the EDA industry’s first simulation solution for UCIe standards, enabling predictions of die-to-die link margin, VTF (Voltage Transfer Function) for channel compliance analysis, and forwarded clock capability.

Synopsys ARC HS4xFS Processor IP has achieved ISO/SAE 21434 cybersecurity certification, meeting stringent automotive regulatory requirements designed to protect connected vehicles from malicious cyberattacks.

Memory-based neural networks

Neo Semiconductor is proposing a new, memory-based solution for implementing neural networks. Its 3D X-AI die includes 300 layers of 3D memory with 128 Gb capacity and one layer of neural circuitry with 8,000 neurons supporting up to 10 TB/s of AI processing throughput per die. By implementing neurons in hardware – as opposed to simulating them through GPUs – and by combining data storage and data processing in a single chip, the solution promises to accelerate neural performance by 100X and to reduce power consumption by 99%. Neo Semiconductor will deliver a keynote on this technology at FMS, “the Future of Memory and Storage” event (formerly Flash Memory Summit) on August 6-8 in Santa Clara, CA.

“MEMS-within-CMOS” capacitors address 6G RF front end challenges

A new solution from Nanusens promises to solve the challenge of creating better RF front ends for 6G. The upcoming 6G devices will need to use more bands and higher frequencies, which calls for tunable antennas and, in turn, for tunable capacitors. According to Nanusens, solid-state switches are not ideal for this application because of their low Q factor, due to their ON state resistance. Conventional RF MEMS tunable capacitors are not ideal, too, as they can suffer from failures caused by dielectric charging. In contrast, Nanusens’ capacitors have no dielectric and, of course, no ON resistance. According to the company, these benefits result is an increase in range by around 14% or more, and up to 30% longer talk times. Nanusens’ MEMS structures can be built using standard CMOS technologies.

Hot spot mapping with 120-nanometer resolution

A research team from University of Rochester has developed a way to pinpoint hot spots in electronic devices with a 120-nanometer resolution, which is impossible to achieve with existing optical thermometry techniques. The new solution is based on “optical super-resolution fluorescence microscopy” techniques, so far used in biological imaging. By applying highly doped upconverting nanoparticles to the surface of a device, the researchers were able to achieve super-high resolution thermometry at the nanoscale level from up to 10 millimeters away.

A ”sparse AI” MCU for edge applications

Femtosense, in partnership with South Korea-based Abov Semiconductor, has launched the AI-ADAM-100, an AI MCU built on “sparse AI” technology to enable on-device AI features such as voice-based control in home appliances and other products. The AI-ADAM-100 integrates the Femtosense Sparse Processing Unit 001 (SPU-001), a neural processing unit (NPU), and an Abov Semiconductor MCU. “Sparse AI” reduces the cost of AI inferencing by zeroing-out irrelevant portions of an algorithm and then only allocating hardware memory and compute resources to the remaining nonzero, relevant portions of the algorithm. According to the companies, this enables manufacturers to implement deep learning–based AI models of up to 100x the power/complexity of previous MCUs without adversely impacting speed, efficiency, memory footprint, or performance.

Advanced packaging market

According to market analysis firm Yole, the advanced packaging market is projected to grow at a CAGR of 11% from 2023 to 2029. In 2023, advanced packaging accounted for approximately 44% of the total IC packaging market, and its share is steadily increasing due to various megatrends, such as AI, HPC, automotive, and AIPCs. After a correction in 2023, the advanced packaging market is set to recover in 2024 and continue its long-term growth. Sub-markets within advanced packaging, including Flip-Chip, SiP, FO, WLCSP, ED, and 2.5D/3D are all experiencing positive growth.

Further reading

A research team from Juelich Supercomputing Centre (Germany), University of Bristol (UK), and Laion AI (Germany) has demonstrated “dramatic breakdown of function and reasoning capabilities” in state-of-the-art Large Language Models such as GPT-3 and its successors. The team tested various LLMs by submitting them a simple question that requires some logical reasoning: “Alice has four brothers and one sister. How many sisters does Alice’s brother have?” Overall, the LLMs had an average correct response rate of well below 50%, with larger models generally performing significantly better than smaller ones. In addition to that, LLMs use pseudo-sensible arguments to support their wrong answers and express strong overconfidence in them. According to the researchers, many of the tested models achieve very high scores in various standardized AI benchmarks designed to test various capabilities, including reasoning, while failing on this very simple problem.

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