Samsung to receive CHIPS Act funding; AnsysGPT; new Palladium and Protium systems; Cadence’s cloud updates

EDA-related updates make up most part of this week’s news roundup, with Cadence in particular introducing several new products. But first, a CHIPS Act update.

Samsung to get $6.4 billion under the US CHIPS and Science Act

The U.S. Department of Commerce and Samsung Electronics have signed a non-binding preliminary memorandum of terms to provide up to $6.4 billion in direct funding under the CHIPS and Science Act. Samsung is expected to invest more than $40 billion in the US in the coming years. The proposed investment would turn Samsung’s existing presence in Texas into a comprehensive ecosystem for the development and production of leading-edge chips, including two new leading-edge logic fabs, an R&D fab, and an advanced packaging facility in Taylor, as well as an expansion to their existing Austin facility.

Ansys’ AI-based virtual assistant

Ansys has released its AI-powered virtual assistant, AnsysGPT, built using ChatGPT technology. The virtual assistant provides responses to queries concerning Ansys products, relevant physics, and other complex engineering topics – including simulation setup. AnsysGPT captures knowledge from new public sources, including product documentation, product and engineering-related training documentation, FAQs, technical marketing materials, and public Ansys Learning Forum discussions.

Cadence’s new Palladium and Protium systems

Cadence has announced the new Palladium Z3 Emulation and Protium X3 FPGA Prototyping systems, offering more than a 2X increase in capacity and a 1.5X performance increase compared to previous-generation systems. The Palladium Z3 and Protium X3 systems scale from job sizes of 16 million gates up to 48 billion gates, so the largest SoCs can be tested as a whole rather than just partial models. The new systems are powered by the Nvidia BlueField DPU and Nvidia Quantum InfiniBand networking platforms. Congruency is maintained when transitioning between the two systems and transitioning from virtual to physical interfaces and vice versa. The Palladium Z3 system accelerates hardware verification, and through functional and interface congruency, models can be quickly brought up onto the Protium X3 system for accelerated software validation.

Cadence’s cloud updates: True Hybrid Cloud, MemVerge collaboration

Cadence’s new True Hybrid Cloud solution for enterprise enables Cadence users to seamlessly transition to hybrid cloud environments. According to the company, this solution makes it more flexible and simpler to leverage a single data source and move between cloud, on-premises, or hybrid multi-cloud environments without any intervention from IT teams. The solution includes NetApp’s ONTAP FlexCache, a data management tool that enables users to access data from anywhere, anytime, without explicit synchronization of incremental data changes. According to Cadence, this capability reduces the initial setup time from days to hours. By leveraging True Hybrid Cloud Solution, Cadence claims it can reduce the additional storage need by up to 90% in many cases.

Cadence has collaborated with MemVerge to enable seamless support for AWS Spot instances for long-running high-memory EDA jobs. AWS Spot instances provide up to 90% cost savings over on-demand pricing. However, certain EDA jobs can take several days to complete and therefore cannot take advantage of Spot instances, which can be taken away within two minutes of notification. According to the company, the Cadence and MemVerge collaboration solves this challenge by implementing a transparent, low-overhead incremental checkpoint/restore solution. This way, even large memory jobs using the Innovus system – which can run for several days – can be completed without disruption, realizing up to 57% and 48% cost savings over AWS on-demand pricing for design top and design block jobs, respectively.

More EDA-related updates: Silvaco, Efabless, Keysight, Siemens/Microsoft

As stated in this SEC form, Silvaco has filed to go public.

Efabless has released OpenLane version 2, a major update of its open-source EDA platform. OpenLane is a Python-based infrastructure designed for implementing ASIC designs, integrating a range of development tools including Yosys, OpenROAD, Magic, and KLayout. Key Highlights of OpenLane 2 include support for the creation of multiple, customizable EDA flows; complete configuration validation and the flexibility to resume flows from specific stages; and improved customizability.

Keysight has introduced RFPro Circuit, a radio frequency simulation tool targeting the complex, multi-physics requirements of advanced RF integrated circuit designs. According to the company, Keysight’s W5600E RFPro Circuit features a new modular architecture that ensures a consistent, streamlined environment for multi-physics co-design across Cadence, Synopsys, and Keysight EDA platforms. Optional electromagnetic and electro-thermal simulators also plug into this new environment, enabling faster design and troubleshooting of wireless RFICs.

In a collaborative move with the W3C Consortium, Siemens and Microsoft have announced their commitment to converge the Digital Twin Definition Language (DTDL) with the Thing Description standard from international standards organization W3C. Microsoft’s DTDL enables modeling of the physical world with Azure services, while the W3C Thing Description standard provides an interoperable representation of device interfaces and their incorporation of standard industry ontologies. The convergence will enable users to describe the physical world in a way that is agnostic to specific IoT platforms.

Acquisitions

Microchip Technology has announced the completed acquisition of Korea-based VSI Co. Ltd., a specialist in high-speed, asymmetric, camera, sensor and display connectivity technologies and products based on the Automotive SerDes Alliance (ASA) open standard for in-vehicle networking.

Microchip Technology has also acquired Neuronix AI Labs (Sunnyvale, CA), which provides a neural network sparsity optimization technology that enables a reduction in power, size and calculations for tasks such as image classification, object detection and semantic segmentation. With this move, Microchip intends to expand its capabilities for power-efficient, AI-enabled edge solutions deployed on its low-power PolarFire FPGAs and SoCs. The acquisition of this technology will allow non-FPGA designers to use industry-standard AI frameworks without a need for RTL expertise or intimate knowledge of the underlying FPGA fabric.

Video suggestions

Microsoft’s VASA is an AI system that generates – in real time – short videos based on a single portrait photo and a speech audio clip. The result is a hyper-realistic talking face video with precise lip-audio sync, lifelike facial behavior, and naturalistic head movements. Sample videos are available here.

Boston Dynamics’ hydraulic anthropomorphic robot Atlas is now retired – a farewell video about him is available here – and will be replaced by a new electric robot, briefly introduced in this video.

This entry was posted on Thursday, April 25th, 2024 at 7:39 am. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.