Is pain a positive thing for character-building? Or is it just that humans instinctively need to find a reason to justify pain? Quite an off-topic question here – but not that much, after all, if it stems from a speech given by Nvidia CEO Jensen Huang. For his take on character-building, see the “Further reading” paragraph at the end of this week’s news roundup. But first, some on-topic technology updates.

New Synopsys announcements from SNUG Silicon Valley

Here’s a quick overview of some of the announcements Synopsys made on occasion of its recently held annual Synopsys User Group (SNUG) conference in Silicon Valley. In the area of multi-die designs, 3DSO.ai is a new AI-driven capability built natively into Synopsys 3DIC Compiler, a unified exploration-to-signoff platform. 3DSO.ai offers optimization for signal integrity, thermal integrity, and power-network design. Also targeted at multi-die designs, Synopsys Platform Architect – Multi-Die accelerates design timelines, delivering – according to the company – a six to twelve month “shift left” from RTL for the analysis of performance and power, while accounting for the interdependencies between multiple dies and allowing early partitioning decisions. Synopsys also unveiled two new hardware-assisted verification solutions: ZeBu EP2, the latest version in the ZeBu EP family of unified emulation and prototyping systems; and HAPS-100 12, Synopsys’ highest capacity and density FPGA-based prototyping system. Additionally, the company introduced Synopsys Cloud Hybrid solution, which enables users to burst from on-prem data centers to the cloud during peak needs – automatically splitting the job based on available capacity and eliminating manual data transfers. Lastly, Synopsys announced that it has completed the acquisition of Netherland-headquartered Intrinsic ID, a provider of Physical Unclonable Function (PUF) IP.

Altair to extend its meshless technology to electronics

Altair has announced the upcoming release of Altair SimSolid for electronics – promising fast, easy, and precise multi-physics scenario exploration for electronics, from chips to PCBs and full system design. SimSolid is an already existing Altair product, which so far has gained adoption in industries such as aerospace and automotive. According to the company, SimSolid’s main benefit is its ability to eliminate geometry simplification and meshing, the two most time-consuming and expertise-intensive tasks done in traditional finite element analysis. As a result, it is up to 25x faster than traditional finite element solvers, and effortlessly handles complex assemblies. Extending Altair SimSolid’s meshless technology to electronics will enable the tool to tackle intricate challenges like signal integrity, power integrity, and electromagnetic compatibility/interference, all while making simulations more accessible and efficient.

(more…)

Not just GPU-based acceleration: the partnerships announced on occasion of this year’s GTC event demonstrate that Nvidia software, too, is a key technology in several existing or upcoming EDA tools

EDA and engineering software received quite a bit of attention at the recent Nvidia GTC event, with “rockstar” CEO Jensen Huang mentioning this theme during his two-hour long keynote, and with some of the major vendors (namely Ansys, Cadence, Siemens – the German parent company, not Mentor – and Synopsys) issuing GTC-related press releases to announce their extended collaboration with Nvidia. While partnerships between Nvidia and EDA vendors are not new, this level of emphasis from both sides seems unprecedented and deserves a closer look.

The announcements issued by EDA and engineering software vendors highlight three main areas of collaboration with Nvidia: GPU-based acceleration; Omniverse-based visualization; and the use of AI development tools encompassed by the Nvidia “AI Foundry” offering. A fourth area, the only one specifically related to the EDA flow, is optical proximity correction based on Nvidia cuLitho.

Software acceleration based on Nvidia GPUs

In GTC-related announcements, the use of Nvidia GPUs for software acceleration was highlighted by Ansys, Cadence and Synopsys. Ansys harnesses Nvidia H100 Tensor Core GPUs to boost multiple simulation solutions, and prioritizes the new Nvidia Blackwell-based processors and Nvidia Grace Hopper for products across its portfolio – including Ansys Fluent, Ansys LS-Dyna, and its electronics and semiconductor products. As for Cadence, previously announced collaborations with Nvidia include the GPU-optimized Fidelity CFD (computational fluid dynamics) software and the Millennium Enterprise Multiphysics Platform, a hardware box for the acceleration of CFD simulations based on Nvidia GPUs. Synopsys is applying Nvidia accelerated compute architectures, including the GH200 Grace Hopper, across its full EDA stack spanning design, verification, simulation and manufacturing. The tool list includes Synopsys VCS, Synopsys Fusion Compiler, Synopsys PrimeSim, Synopsys Proteus (see below).

(more…)

Will “programmed logic” (that is, GPUs and deep learning accelerators) give way to “hard-wired logic” in artificial intelligence applications? Taalas, a startup recently emerged from stealth, has no doubt about that (see the news below). Meanwhile, programmed logic keeps advancing – with Cerebras doubling down on its wafer-scale approach and launching a four trillion transistor chip. Other news this week, besides Taalas, contribute to the feeling that the end of geometrical scaling won’t stop IT advancements. That includes chiplet-based solutions, of course, but also new transistor types.

Hard-wired AI models promise a 1000x improvement in computational power and efficiency

Toronto-based Taalas has recently exited stealth mode and raised $50 million dollars over two rounds of funding led by Pierre Lamond and Quiet Capital. The company’s mission is to develop an automated flow for rapidly implementing all types of deep learning models (transformers, SSMs, diffusers, MoEs, etc.) in silicon. According to the company, proprietary innovations enable one of its chips to hold an entire large AI model without requiring external memory. Taalas claims that the efficiency of hard-wired computation enables a single chip to outperform a small GPU-based data center, opening the way to a 1000x improvement in the cost of AI. “The path forward is to realize that we should not be simulating intelligence on general purpose computers, but casting intelligence directly into silicon. Implementing deep learning models in silicon is the straightest path to sustainable AI,” said Ljubisa Bajic, Taalas’ CEO. Prior to co-founding Taalas, Bajic founded Tenstorrent in 2016.

Intel outlines a UCIe-3D solution

In a paper recently published on Nature Electronics, a team of Intel researchers propose a solution for using the UCIe standard in the three-dimensional integration of chiplets. According to the authors, their architectural approach provides power, performance and reliability characteristics approaching or exceeding that of a monolithic system-on-chip design as the bump pitch approaches 1 µm. Research findings include that – contrary to trends seen in traditional signalling interfaces – the most power-efficient performance for these architectures can be achieved by reducing the frequency as the bump pitch goes down. The Intel vision is that two chiplets will connect using multiple independent modules, with each UCIe-3D PHY directly controlled by the Network-on-Chip controller. To realize this vision, the authors anticipate challenges in the areas of cooling, power delivery and reliability. Advances in electronic design automation will be necessary, too.

(more…)

The U.S. government is reportedly asking the Netherlands, Germany, South Korea and Japan to put in place additional restrictions on exports to China. Japan is being asked to limit exports of chemicals such as photoresist, the Netherlands to stop ASML from servicing and repairing lithography equipment installed in China before limits on sales were put in place. Moving to this week’s news roundup, the trend towards convergence between EDA and the rest of engineering software continues – with Cadence’s acquisition of Beta CAE. Even though much smaller in financial terms ($1.24 billion), this move can be likened to the recent Synopsys’ acquisition of Ansys.

Cadence acquires structural analysis tool vendor Beta CAE

Cadence has entered into a definitive agreement to acquire Switzerland-based Beta CAE, a leading provider of structural analysis and multi-domain simulation solutions. Beta CAE has a strong presence in the automotive industry. Its flagship products include Ansa, a multidisciplinary CAE pre-processor, and Meta, a multidisciplinary CAE post-processor. Additionally, Beta CAE’s Epilysis and Fatiq solvers are used in structural analysis and optimization problems, while the SPDRM (simulation, process, data, and resources management) tool manages the CAE processes. According to Cadence, Beta CAE’s products are very complementary to Cadence’s multiphysics system analysis portfolio – which includes Clarity, Celsius, Sigrity, Voltus, Fidelity and the recently announced Millennium M1 multiphysics platform.

Altera gets its name back after eight years

Following last October decision to operate its Programmable Solutions Group as a standalone business, Intel has recently rebranded it as “Altera”. In other words, the entity is getting its original name back. Intel bought FPGA vendor Altera in 2015 and dropped its name. Now this famous brand will reappear, with the addition of “An Intel Company”. Led by CEO Sandra Rivera, Altera is now seeking additional growth opportunities in AI applications. The company has preannounced a new product series called Agilex 3 – a low-power line of FPGAs aimed at low-complexity functions for cloud, communications and intelligent edge applications. Intel plans to hold a public offering for stock in Altera over the next two to three years.

(more…)