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Archive for February 29th, 2024

CHIPS Act updates; Japan advancements; record Nvidia results; high-NA EUV ecosystem

Thursday, February 29th, 2024

Research papers make up a large part of this week’s news roundup, some of them from the recently held ISSCC or from SPIE 2024 Advanced Lithography + Patterning Conference. But first, some updates on US and Japan’s efforts to revive their respective semiconductor industries, and some financial results.

US CHIPS Act funding applications far exceed available resources

U.S. Secretary of Commerce Gina Raimondo has recently provided some updates on the implementation of the CHIPS and Science Act. In total, applicant companies have requested more than $70 billion in federal subsidies, roughly twice the amount of funding that is available, she said. Therefore, in her conversations with chips company CEOs asking for a certain amount of funding, Raimondo tells them “You will be lucky to get half of that.” Raimondo also said the department is prioritizing projects that will be operational by 2030. U.S. Secretary of Commerce reiterated the CHIPS Act’s goal: “We think our investments in leading-edge logic chips, leading-edge logic chip manufacturing, will put this country on track to produce roughly 20% of the world’s leading-edge logic chips by the end of the decade,” she said. “Today we are at zero.”

Japan updates: TSMC, Tenstorrent

TSMC has recently held an opening ceremony for its majority-owned subsidiary Japan Advanced Semiconductor Manufacturing (JASM) in Kumamoto Prefecture, Japan. Market research firm TrendForce forecasts the plant’s total capacity to hit 40–50K wafers per month, focusing mainly on 22/28-nanometer processes with a dash of 12/16-nanometer, paving the way for the next phase of the Kumamoto expansion. The Japanese government has reportedly said it will give TSMC up to $4.86 billion more in subsidies to help it build a second chip fabrication plant in the country.

US-headquartered AI chip developer Tenstorrent has announced a partnership deal with Japan’s Leading-edge Semiconductor Technology Center (LSTC), which selected Tenstorrent’s Risc-V and chiplet IP for its edge 2-nanometer AI accelerator. In addition to the IP licensing portion of this deal, Tenstorrent will work with LSTC to co-design the chip. Under this project, Tenstorrent will also work with Japan-based Rapidus, which is planning to offer – besides chip fabrication – also advanced packaging technologies.

Market research firm TrendForce is optimistic about Japan’s chances to regain a leading position in the semiconductor industry, thanks to its equipment/material suppliers (TEL, JSR, Screen, Sumco, Shin-Etsu), availability of talent and water, a growing presence of TSMC which includes a 3D IC research center and plans for further plants.

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