EDACafe Editorial Roberto Frazzoli
Roberto Frazzoli is a contributing editor to EDACafe. His interests as a technology journalist focus on the semiconductor ecosystem in all its aspects. Roberto started covering electronics in 1987. His weekly contribution to EDACafe started in early 2019. New thermal EDA solutions; Samsung’s 2nd generation 3nm process; Infineon’s automotive deals; YMTC in Pentagon’s crosshairsFebruary 1st, 2024 by Roberto Frazzoli
Confirming the growing importance of thermal aspects in electronic design, this week’s news roundup opens with two EDA announcements in this area. South Korea is also in the news with Samsung’s 3-nanometer updates and the country’s “mega cluster” plan. Thermal design solutions from Cadence and Siemens EDA Cadence has announced Celsius Studio, what it claims is the industry’s first complete AI thermal design and analysis solution for electronic systems. Celsius Studio addresses thermal analysis and thermal stress for 2.5D and 3D-ICs and IC packaging, in addition to electronics cooling for PCBs and complete electronic assemblies. According to Cadence, current product offerings in the area of thermal design consist mostly of disparate point tools, whereas Celsius Studio is a unified platform that lets electrical and mechanical/thermal engineers concurrently design, analyze and optimize product performance without the need for geometry simplification, manipulation and/or translation. Celsius Studio aims at system-level thermal integrity, converging electro-thermal co-simulation, electronics cooling and thermal stress. It was made possible by Cadence’s acquisition of Future Facilities in 2022. Siemens EDA’s latest updates to Simcenter Flotherm software for electronics cooling simulation includes the “Embeddable Boundary Condition Independent Reduced Order Model” (BCI-ROM) technology, which allows a semiconductor company to generate an accurate model that can be shared with their clients for use in downstream high-fidelity 3D thermal analysis without exposing the IC’s internal physical structure. Siemens EDA introduced BCI-ROM in this October 2023 article.
Keysight’s Chiplet PHY Designer aims at UCIe compliance Keysight has introduced Chiplet PHY Designer, what it claims is the industry’s first tool to provide modeling and simulation capabilities that enable chiplet designers to rapidly and accurately verify that their designs meet specifications of the Universal Chiplet Interconnect Express (UCIe) standard. The tool supports UCIe physical layer standard, provides measurement of voltage transfer function, and the analysis of forwarded clocking. Natural language to Verilog: new RapidGPT release RapidGPT – an AI-powered assistant for FPGA designers that generates Verilog code from a natural language description of the designer’s intent – is now available in a premium version with new features. Previously published by eFPGA IP vendor Rapid Silicon, RapidGPT is now part of the product offering of PrimisAI. Samsung reportedly testing its second-generation 3-nanometer process Samsung Electronics has reportedly initiated production of prototypes using its second-generation 3-nanometer process. Currently testing the chip’s performance and reliability, Samsung aims to achieve a yield of over 60 percent for this process within the next six months. The first chip utilizing Samsung’s second-generation 3-nanometer process is expected to be an application processor designed for wearables, including the upcoming Galaxy Watch 7 scheduled for release later this year. Using this product as a testing ground, Samsung reportedly plans to implement this process into Samsung Electronics System LSI’s Exynos 2500 for the forthcoming Galaxy S25, expected to debut next year. South Korea’s semiconductor mega cluster In a recent public debate, the South Korean government presented “the world’s largest and most advanced mega semiconductor cluster formation plan”. Currently featuring 19 production fabs and 2 research fabs, the cluster is anticipated to grow with the addition of 16 new fabs (13 production fabs, 3 research fabs), with a combined production of 7.7 million wafers per month by 2030, making it the world’s largest. The South Korean government expects the mega cluster to generate a total of 3.46 million direct and indirect jobs and to achieve semiconductor exports of 120 billion dollars. Among the plan’s targets is achieving 10% or more “system semiconductor” market share and over 50% supply chain self-reliance rate. The expression “system semiconductors” is used by South Korean media to designate non-memory chips. The Asian country is notoriously a world leader in memory chips, and aims to improve its current ranking in non-memory chips. SK Hynix to reportedly build a packaging facility in Indiana And speaking of South Korean memory chips, SK Hynix has reportedly chosen the state of Indiana for an advanced packaging facility in the United States. The new plant in Indiana would focus on integrating HBM chips with Nvidia’s GPUs. Reportedly, this integration job is currently carried out by TSMC in Taiwan. Infineon’s automotive updates Infineon has recently announced a number of agreements and achievements concerning automotive applications. The German chipmaker has partnered with Israel-headquartered Aurora Labs to create a new set of AI-based predictive maintenance solutions for critical automotive components, including steering, braking and airbags. The solutions implement Aurora Labs’ Line-of-Code Intelligence (LOCI) AI technology on Infineon’s 32-bit TriCore Aurix TC4x family of microcontrollers. Another family of Aurix automotive microcontrollers – the TC3x, in a 40-nanonmeter process – is the main subject of a new multi-year agreement with GlobalFoundries, along with power management and connectivity solutions. Infineon and GF have been partnering since 2013. As for Infineon’s silicon carbide strategy, two separate agreements involve SK Siltron CSS and Wolfspeed. SK Siltron CSS will provide Infineon with competitive and high-quality 150-millimeter SiC wafers, supporting the production of SiC semiconductors. In a subsequent phase, SK Siltron CSS will assist Infineon in transitioning to a 200-millimeter wafer diameter. Wolfspeed – extending an existing long-term 150mm silicon carbide wafer supply agreement signed in February 2018 – will grant Infineon a multi-year capacity reservation. Moving to security technologies, Infineon has claimed to be the first company in the industry to receive the ISO/SAE 21434 cybersecurity certification, which was granted to its SLI37 automotive security controller family, targeting applications such as secured devices for V2X (Vehicle-to-everything) communication. Lastly, Infineon and Honda Motor have signed a Memorandum of Understanding to build a strategic collaboration. Honda selects Infineon as semiconductor partner to align future product and technology roadmaps. Aspects of collaboration include supply stability, transfer of mutual knowledge, time to market of technologies. The MoU focuses in particular on power semiconductors, Advanced Driver Assistance Systems (ADAS), and new E/E architectures. YMTC and other Chinese companies in Pentagon’s crosshairs The US Department of Defense has recently updated the list of Chinese civil entities that – according to the Pentagon – are supporting the modernization goals of the Chinese military. As highlighted by a Reuters report, new additions to the list include memory maker YMTC, artificial intelligence company Megvii, lidar maker Hesai Technology and video tech company NetPosa. In 2023, Canadian analysis firm TechInsights credited YMTC for creating the world’s most-advanced memory chip, a 232-layer 3D NAND. Acquisitions Qorvo has reached a definitive agreement to acquire Anokiwave, a specialist supplier of high-frequency beamforming and IF-to-RF conversion ICs for intelligent active array antennas. Application areas include defense and aerospace, satellites and 5G. Anokiwave is based in Boston, MA, and operates design centers and sales offices in Boston, MA and San Diego, CA. |