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Archive for February, 2024

CHIPS Act updates; Japan advancements; record Nvidia results; high-NA EUV ecosystem

Thursday, February 29th, 2024

Research papers make up a large part of this week’s news roundup, some of them from the recently held ISSCC or from SPIE 2024 Advanced Lithography + Patterning Conference. But first, some updates on US and Japan’s efforts to revive their respective semiconductor industries, and some financial results.

US CHIPS Act funding applications far exceed available resources

U.S. Secretary of Commerce Gina Raimondo has recently provided some updates on the implementation of the CHIPS and Science Act. In total, applicant companies have requested more than $70 billion in federal subsidies, roughly twice the amount of funding that is available, she said. Therefore, in her conversations with chips company CEOs asking for a certain amount of funding, Raimondo tells them “You will be lucky to get half of that.” Raimondo also said the department is prioritizing projects that will be operational by 2030. U.S. Secretary of Commerce reiterated the CHIPS Act’s goal: “We think our investments in leading-edge logic chips, leading-edge logic chip manufacturing, will put this country on track to produce roughly 20% of the world’s leading-edge logic chips by the end of the decade,” she said. “Today we are at zero.”

Japan updates: TSMC, Tenstorrent

TSMC has recently held an opening ceremony for its majority-owned subsidiary Japan Advanced Semiconductor Manufacturing (JASM) in Kumamoto Prefecture, Japan. Market research firm TrendForce forecasts the plant’s total capacity to hit 40–50K wafers per month, focusing mainly on 22/28-nanometer processes with a dash of 12/16-nanometer, paving the way for the next phase of the Kumamoto expansion. The Japanese government has reportedly said it will give TSMC up to $4.86 billion more in subsidies to help it build a second chip fabrication plant in the country.

US-headquartered AI chip developer Tenstorrent has announced a partnership deal with Japan’s Leading-edge Semiconductor Technology Center (LSTC), which selected Tenstorrent’s Risc-V and chiplet IP for its edge 2-nanometer AI accelerator. In addition to the IP licensing portion of this deal, Tenstorrent will work with LSTC to co-design the chip. Under this project, Tenstorrent will also work with Japan-based Rapidus, which is planning to offer – besides chip fabrication – also advanced packaging technologies.

Market research firm TrendForce is optimistic about Japan’s chances to regain a leading position in the semiconductor industry, thanks to its equipment/material suppliers (TEL, JSR, Screen, Sumco, Shin-Etsu), availability of talent and water, a growing presence of TSMC which includes a 3D IC research center and plans for further plants.

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Arm’s chiplet initiatives; SoftBank reportedly planning a chip venture; new Siemens Veloce systems; new ADC architecture

Thursday, February 22nd, 2024

What’s cooking at Arm after the recent, emboldening surge in its market capitalization? On the one hand, the company has unveiled two initiatives aimed at taking center stage in the emerging chiplet-based market and ecosystem. On the other hand, Masayoshi Son – CEO of SoftBank Group, the Japanese holding company that owns a 90% stake in Arm – is reportedly looking to raise up to $100 billion for a chip venture that will rival Nvidia, with a potential help from Middle Eastern investors. Should this be confirmed, some questions would arise. Why would SoftBank challenge Nvidia? After all, the surge in Arm’s market capitalization seems to be an effect of the role played by Arm CPUs in Nvidia-based AI solutions. Does SoftBank feel that the pervasiveness of Arm CPUs is an advantage position enabling it to pursue additional AI opportunities, besides Nvidia? Will Arm continue to be a pure-play, neutral IP provider, if SoftBank gets involved in a “chip venture”? As for the Middle Eastern potential investors, the report does not mention any country names, but if it were Saudi Arabia or the UAE then SoftBank would be knocking on the same doors as OpenAI’s Sam Altman – who is also reportedly hoping to raise money from investors in that geography, for his gigantic semiconductor plan. Should those investors actually agree on satisfying all these requests, the role of Middle East in semiconductor funding would become an additional geopolitical factor to consider in the context of the current “chip war”. And now, let’s move to the news.

SoftBank reportedly planning a “chip venture”

SoftBank Group’s CEO Masayoshi Son is reportedly looking to raise up to $100 billion for a chip venture that will rival Nvidia. According to the report, the project – code named Izanagi – will supply semiconductors essential for artificial intelligence. SoftBank would inject $30 billion in the project, with an additional $70 billion potentially coming from Middle Eastern institutions.

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Renesas to buy Altium; Nvidia to reportedly offer bespoke chips; Quilter’s AI-based PCB design tool; Cadence 2023 results

Thursday, February 15th, 2024

Let’s start with some comments, before getting to the news. Renesas’ acquisition of Altium will create a new, arguably unprecedented type of “bundle offer” targeted at system makers, by combining a portfolio of building blocks (chips) with a cloud-based software platform that is expected to reduce the system integration effort to put those blocks together. Will this help Renesas to sell more chips? Will this help Altium to sell more licenses? An obvious observation is that a system usually requires chips from a number of different vendors, so it’s not clear how a “privileged” relationship between a PCB design tool and just one specific chip vendor could benefit users. Unless the combined offering aims at making design system easier and more efficient for any choice of chips, including the ones that compete against Renesas products. But if this the case, it’s not clear how this could benefit Renesas. As for the impact of this acquisition on the EDA industry, it could be noted that Japan-headquartered Renesas is now directly competing against another Japanese company – Zuken – in the area of PCB design tools.

Another interesting news concerns Nvidia, reportedly building a new business unit to design bespoke chips for customers such as the hyperscalers. Waiting for more details, it can be observed that the hyperscalers internally developing their own AI chips seem to have made this decision also to gain independence from Nvidia, not just because they want tailor-made chips. In addition to that, one could ask if a new offering of bespoke GPUs could contribute to solving the GPU shortage – given the current global foundry capacity. OpenAI’s Sam Altman, who is on a mission to raise money to build new fabs, clearly thinks that the bottleneck is insufficient foundry capacity. And now, let’s move to the news.

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Cadence’s Multiphysics Platform; Arm’s record numbers; stretching the capabilities of standard packaging

Thursday, February 8th, 2024

Going public has proven to be a good choice for Arm so far. As reported by Reuters, Arm’s share price increased by more than 30% on February 7 on the strong forecast the company announced on occasion of its last quarter results. Arm’s shares are now reportedly traded at twice the price of the initial public offering. Arm’s results are part of this week’s news roundup; but first, some EDA updates.

EDA updates: Cadence, Ansys, SignatureIP, Accellera

Challenging multiphysics incumbents such as Ansys, Cadence has announced its Millennium Enterprise Multiphysics Platform, what it claims is the industry’s first hardware/software accelerated digital twin solution for multiphysics system design and analysis. The first-generation Millennium M1 accelerates high-fidelity computational fluid dynamics (CFD) simulations, mostly targeting the simulation of complex mechanical systems. Available in the cloud or on premises, this solution includes GPUs from “leading providers”, and a Cadence Fidelity CFD software stack optimized for GPU acceleration and generative AI. Millennium M1 instances can be fused into a unified cluster, enabling near-linear scalability.

The latest release from Ansys, 2024 R1, includes a new user interface and a number of other improvements. As for electronics applications, Ansys claims that this release offers significant advances in simulation performance, meshing, and automated workflows. It covers various applications such as combined chip-package-PCB simulation, RF, HPC, 3D IC, and electric motors. New capabilities include ECAD-MCAD integration in Ansys Maxwell for flex and rigid PCBs, adaptive templates in Ansys Motor-CAD, and multi-solver interoperability for multiphysics and multiscale solutions.

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New thermal EDA solutions; Samsung’s 2nd generation 3nm process; Infineon’s automotive deals; YMTC in Pentagon’s crosshairs

Thursday, February 1st, 2024

Confirming the growing importance of thermal aspects in electronic design, this week’s news roundup opens with two EDA announcements in this area. South Korea is also in the news with Samsung’s 3-nanometer updates and the country’s “mega cluster” plan.

Thermal design solutions from Cadence and Siemens EDA

Cadence has announced Celsius Studio, what it claims is the industry’s first complete AI thermal design and analysis solution for electronic systems. Celsius Studio addresses thermal analysis and thermal stress for 2.5D and 3D-ICs and IC packaging, in addition to electronics cooling for PCBs and complete electronic assemblies. According to Cadence, current product offerings in the area of thermal design consist mostly of disparate point tools, whereas Celsius Studio is a unified platform that lets electrical and mechanical/thermal engineers concurrently design, analyze and optimize product performance without the need for geometry simplification, manipulation and/or translation. Celsius Studio aims at system-level thermal integrity, converging electro-thermal co-simulation, electronics cooling and thermal stress. It was made possible by Cadence’s acquisition of Future Facilities in 2022.

Siemens EDA’s latest updates to Simcenter Flotherm software for electronics cooling simulation includes the “Embeddable Boundary Condition Independent Reduced Order Model” (BCI-ROM) technology, which allows a semiconductor company to generate an accurate model that can be shared with their clients for use in downstream high-fidelity 3D thermal analysis without exposing the IC’s internal physical structure. Siemens EDA introduced BCI-ROM in this October 2023 article.

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