Thanks to real-time integration with the physical design flow and to new optimization algorithms, the solution promises dramatic TAT improvements and significant PPA benefits for large SoCs and multi-die designs – running on single box hardware
Major EDA vendors are launching new products to address the challenges of design closure and ECOs in deep-submicron SoCs. On October 5th Synopsys introduced its new PrimeClosure solution. Jacob Avidan, senior vice president of Engineering for the Silicon Realization Group at Synopsys, described the features of PrimeClosure in the video interview he recently gave to EDACafe’s Sanjay Gangal. Building on that interview, in this article we will add some more details about the new solution by means of the answers that Manoj Chacko, Director of Product Marketing for Synopsys PrimeClosure, provided to our additional questions.
