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Archive for October 7th, 2022

EDA updates on ECO, DFT; Samsung’s roadmap; Intel Innovation; new fabs; EU common charger

Friday, October 7th, 2022

Plenty of news from the whole ICT-semiconductor ecosystem this week, some of them with a common underlying theme: the advent of chiplet-based 3D devices. Let’s start with some EDA updates.

Synopsys’ ‘streaming fabric’ for silicon lifecycle management

Synopsys has announced a streaming fabric technology aimed to shorten both silicon data access and test time – by up to 80%, according to the company – while also minimizing excessive power. Generated by Synopsys TestMAX DFT tool and part of Synopsys’ silicon lifecycle management flow, the new streaming fabric is an on-chip network that transports silicon data to and from multiple design blocks and multi-die systems. According to Synopsys, the fabric calls for minimal planning effort and has a limited physical impact on design. Additionally, a new power estimation technology incorporated in Synopsys TestMAX ATPG solution more accurately determines power drawn at data application time.

Synopsys’ new ECO solution

Synopsys has also announced PrimeClosure, a golden signoff ECO (engineering change order) solution that addresses lengthy engineering design closure times. According to the company, early customers have achieved up to 45% better timing, up to 10% better power, up to 50% fewer ECO iterations and up to 10x higher design productivity compared to traditional ECO flows. PrimeClosure has direct access to incrementally enabled placement, routing, extraction, physical verification, equivalence checking and signoff technologies from the other Synopsys tools, and is integrated with Ansys RedHawk-SC digital power integrity signoff solution, enabling to account for and fix up to 50% of late-stage dynamic voltage drop violations and maximize energy efficiency without impacting chip timing.

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