EDA goes SaaS; UCIe expansion; eFPGAs’ growth; ReRAM advancements; Risc-V; Zoned Storage; MLPerf

As the news from Ukraine gets more and more disturbing, the list of Western tech firm that have suspended business operations in Russia gets longer: among them, Intel. Before moving to this week’s tech news round-up, a quick mention of a market forecast concerning datacenters: according to market research firm TrendForce, the penetration rate of Arm architecture in datacenter servers will reach 22% by 2025.

Synopsys launches an EDA cloud SaaS solution

Synopsys has announced a new cloud-optimized EDA deployment model based on a single-source, pay-as-you-go approach. Called Synopsys Cloud, the service provides access to the company’s cloud-optimized design and verification products, with pre-optimized infrastructure on Microsoft Azure. The initiative aims at overcoming the limitations of conventional cloud-based EDA design, such as the difficulties in forecasting compute needs – leading to underestimation – or predefined design and verification capacity of the “bring your own cloud” (BYOC) approach. Synopsys is also working with major foundries to streamline access to required manufacturing collateral for use with its cloud-optimized products.

Astera Labs, VeriSilicon join the UCIe consortium

Universal Chiplet Interconnect Express (UCIe), an open specification that defines the interconnect between chiplets within a package, is gaining momentum. Astera Labs (Santa Clara, CA), a fabless semiconductor company developing purpose-built connectivity solutions for the data center, is joining the UCIe consortium and planning to develop products such as UCIe retimers and UCIe memory accelerators. IP vendor VeriSilicon (Shanghai, China) has also joined the UCIe consortium to support development of its chiplet-based technology and associated products.

eFPGAs gain momentum

QuickLogic has announced that it has won a new eFPGA contract – from an undisclosed customer – worth approximately $1.5 million, bringing the aggregate value of its eFPGA contracts in the last three quarters alone to more than $5 million. According to the company, QuickLogic was awarded the contract as it was able to produce customized eFPGA fabric quickly using its Australis eFPGA IP Generator, and due to its prior experience with the process node.

Flex Logix has announced it has signed licenses to develop more than 32 ASICs/SoCs integrating its EFLX eFPGAs, with nearly half already working in silicon. While many of these design wins are confidential, the customers that have publicly announced their deals include Air Force Research Laboratory, Boeing, DARPA, Datang Telecom/MorningCore Technology, Renesas/Dialog, Sandia National Labs, SiFive, Socionext, and the U.S. Department of Defense.

ReRAM updates: CrossBar, Weebit Nano

CrossBar (Santa Clara, CA) has announced new applications of its Resistive RAM (ReRAM) technology for use in secure storage and processing, where resistance to reverse engineering and physical attacks are essential requirements of the system. According to the company, it is not feasible to externally read the physical ReRAM cell electrically, magnetically or through imaging techniques even after delamination of the silicon. Compared to oxide-based ReRAM, CrossBar’s ReRAM utilizes stochastic electro-chemical ionic movement that is more difficult to analyze or useful for inferring the contents of the ReRAM. The ReRAM-based cell microstructure changes are unclonable, and unlikely to be detected using invasive techniques such as FIB (Focused Ion Beam) or SEM (Scanning Electron Microscopy) or TEM (Transmission Electron Microscopy) sampling. For example, TEM images of two ReRAM cells holding data states of “1” or “0” show no differences in physical appearance.

Weebit Nano confirms that demo chips integrating its embedded Resistive Random-Access Memory (ReRAM) module have successfully completed their functional testing phase, a key step towards delivering a commercial product. These are the first available System-on-Chips (SoCs) embedding the Weebit ReRAM array inside its memory module.

Risc-V International aims to minimize ISA fragmentation

Risc-V International, the nonprofit association chartered to standardize and promote the open Risc-V instruction set architecture, has reportedly shared a survey on its mailing list to collect feedback to “help identify ISA gaps, build plans for future extensions, and preserve compatibility among Risc-V applications.” According to the press report, the goal of the initiative is avoiding the fragmentation that happened in MIPS or Android. Obviously, official ratification of popular ISA extensions will not prevent users from developing their own custom ones.

Samsung Electronics and Western Digital join forces for Zoned Storage

Samsung Electronics and Western Digital have signed a memorandum of understanding for a collaboration to standardize and drive broad adoption of D2PF (data placement, processing and fabrics) next-generation storage technologies. The companies will initially focus on creating an ecosystem for Zoned Storage solutions. As explained in this Western Digital web page, there are two technologies behind Zoned Storage: Shingled Magnetic Recording (SMR) in HDDs and Zoned Namespaces (ZNS) in SSDs. Zoned storage devices, such as ZNS SSDs are divided into zones, significantly simplifying the drive architecture and minimizing the need for complex data management.

Credit: Samsung Electronics

New MLPerf results

On April 6^th MLCommons released new results for three MLPerf benchmark suites – Inference v2.0, Mobile v2.0, and Tiny v0.7. The latest MLPerf results demonstrate wide industry participation, an emphasis on energy efficiency, and up to 3.3X greater performance. This round, the MLPerf Inference benchmarks set new records with over 3,900 performance results and 2,200 power measurements, respectively 2X and 6X more than the prior round. The MLPerf Tiny benchmark suite saw 3X more results than the first round and over half the results incorporating energy measurements. Specific benchmark results have been posted in the MLCommons website.

Acquisitions

AMD has entered into a definitive agreement to acquire Pensando (Milpitas, CA) for approximately $1.9 billion. Pensando’s datacenter distributed services platform includes a packet processor and software stack that accelerate networking, security, storage and other services for cloud, enterprise and edge applications. Pensando’s products are already deployed at scale across cloud and enterprise customers, including Goldman Sachs, IBM Cloud, Microsoft Azure and Oracle Cloud.

Qualcomm has completed its acquisition of ADAS developer Arriver from SSW Partners. As a result of the acquisition, Qualcomm will incorporate Arriver’s Computer Vision, Drive Policy and Driver Assistance assets into its Snapdragon Ride Platform portfolio, building on its previous collaboration with Arriver, when owned by Veoneer.

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