Cadence’s 2021 results; Intel Investor Meeting; China’s wafer capacity

War in Europe is obviously our top news update this week, even though war coverage is the job of TVs and daily newspapers. For our part, going forward we will try to monitor the impact that this tragic event is going to have on the semiconductor ecosystem and on the IT industry – in terms of supply chain disruptions, sanctions consequences and so on. For the moment, let’s move to our usual weekly news update.

Cadence’s 2021 results

Cadence achieved a revenue growth of 11% in 2021, reporting a $2.988 billion income compared to $2.683 billion for 2020. On a GAAP basis, in 2021 the company obtained an operating margin of 26 percent. The outlook for 2022 projects a revenue growth of approximately 12%. In a prepared statement issued on occasion of the latest financial results conference call, Cadence’s CEO Anirudh Devgan provided some details about the results achieved by the company in 2021. Cadence’s digital full flow was adopted by more than forty-five additional customers during the year, and preexisting relationships with Oppo and Socionext were expanded. As for the machine learning-based Cerebrus solution, Devgan only mentioned the benefits obtained by some unidentified users: a “market shaping U.S automotive company” reduced the power consumption of a critical five nanometer SoC AI block by nearly ten percent in just two weeks; a “premier Asia Pacific systems company” reduced power of their four-nanometer design by ten percent with one-tenth the effort of manual optimization; a “marquee US semiconductor company” taped out their next generation SoC with a 5x productivity improvement on several critical blocks. In 2021, Cadence’s Verification business grew twenty percent year-over-year, fueled by what Devgan called “a record year for hardware.” Demand for Palladium Z2 and Protium X2 platforms “has greatly exceeded our expectations,” he said. More than half of customers purchased both platforms during the year, and the “hardware family” added over thirty new customers. Devgan also pointed out that 2021 was “an exceptional year” for Jasper formal verification platform, which added over forty new customers. Other details offered by Devgan include SK Hynix and Micron being among the adopters of Spectre FX FastSPICE; the addition of “nearly a hundred new logos (…) notably in Aerospace & Defense” following Cadence’s acquisitions of Numeca and Pointwise; and the growth of cloud-based solutions, now used by over 250 customers.

Cadence also announced a strategic partnership with French company Dassault Systèmes, through which the Allegro platform has been have combined with Dassaults’ 3DExperience platform to create a ‘virtual twin’ experience that integrates capabilities for electronic and mechanical products.

Anirudh Devgan. Credit: Cadence

Gelsinger vows to rebuild Intel’s ‘Groveian’ execution engine

A patchwork of old photos showing a young Pat Gelsinger during his early years at Intel opened the slide deck he recently used to address the investor community. The 43-slide document is an interesting digest of the CEO’s strategy for the new Intel’s course, and includes several slogans such as “We’re rebuilding our ‘Groveian’ execution engine” (with reference to Andy Grove) and “Intel is the next great growth story”. Among other things, Gelsinger said he remains confident Intel “will regain process leadership”, developing “five nodes in four years”. He also claimed that Intel is the only company who can provide geographically balanced at-scale manufacturing; pledged commitment to open ecosystems; and highlighted Intel’s 19,000 software engineers as one of the company’s competitive advantages. Speaking of the recently established Intel Foundry Service business (IFS), Gelsinger said “Being an IDM makes us better at IFS… and IFS makes us a better IDM”.

Also on the occasion of Intel’s Investor Meeting, Dr. Ann B. Kelleher, executive vice president and general manager of Technology Development at Intel, authored an article where she described the company’s forecast for the future of IT: “We are projecting that by the end of this decade, on average, all of us will have 1 petaflop (1015 floating-point operations per second) of compute and 1 petabyte of data less than 1 millisecond away.”

Credit: Intel

China’s wafer capacity growth

According to Knometa Research, China’s share of the world’s capacity for fabricating IC wafers continued to grow in 2021, reaching 16%, based on normalized installed monthly capacity amounts. Worldwide IC wafer capacity at the end of 2021 was 21.6 million 200mm-equivalent wafers per month, with fabs in China having the capacity to process 3.5 million. The cost of building and operating a fab in China is lower than in any other nation; as a result, fab capacity is expanding faster in this Asian country than anywhere else. Roughly half of all IC wafer capacity in China is controlled by foreign companies – such as SK Hynix, Samsung, TSMC, and UMC. According to Knometa’s projections, China’s share of global IC wafer capacity is expected to reach nearly 19% by 2024. While SK Hynix, TSMC, and UMC are expanding their existing fabs in China, most of the new fabs under construction in the country are owned by domestic entities.

Image sensor and video processing updates: STmicroelectronics, Omnivision, Hisense

STMicroelectronics’ new family of high-resolution Time-of-Flight sensors brings 3D depth imaging to smartphones and other devices. The VD 55H1, first member of the family, maps three-dimensional surfaces by measuring the distance to over half a million points (a 672 x 804 back-side illuminated pixel array). Objects can be detected up to five meters from the sensor. Target applications include AR/VR (room mapping, gaming, 3D avatars), smartphones (improving camera-system features and face-authentication security), robotics (3D scene mapping). Indirect time-of-flight sensors, such as VD55H1, calculate the distance to objects by measuring the phase shift between the reflected signal and the emitted signal. Thanks to a modulation frequency of 200MHz and other features, the device boasts low depth noise, a depth accuracy better than 1% and a typical precision of 0.1% of distance.

Omnivision (Santa Clara, CA) has achieved what it claims is the world’s smallest pixel, measuring 0.56-µm – less than the wavelength of red light – without compromising quantum efficiency and quad phase detection performance. The company stresses its R&D effort and the support it received from TSMC. The first 0.56µm pixel die will be implemented in 200-megapixel image sensors for smartphones in Q2 2022.

China-based Hisense has recently announced a self-developed 8K video processor, called “AI Perceptual Processor” as it uses artificial intelligence techniques to improve the definition, contrast, and three-dimensional sense of TV pictures. The chip supports over 33 million pixels and applies a partition control on 26,880 zones of the image.

Upcoming events

Nvidia GTC will take place from March 21 to 24. Nvidia’s CEO Jensen Huang’s keynote is scheduled for March 22.

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