Later this year the industry will celebrate the tenth anniversary of the publication of AlexNet, widely considered the starting point of the current neural network boom. But another celebration took place recently: the fiftieth anniversary of the microprocessor. The magazine “IEEE Micro” has devoted a special issue to this event, hosting – among others – an article from Federico Faggin telling the story of the Intel 4004. EETimes also turned fifty recently, and veteran semiconductor analyst Malcolm Penn celebrated this anniversary by contributing three articles on the history of Silicon Valley: here are Part One, Part Two and Part Three. Let’s now quickly catch up on some of the news updates from December and early January.
IBM and Samsung develop the vertical FET
IBM and Samsung Electronics have jointly announced a new vertical transistor architecture called VTFET that promises further scaling beyond nanosheet. As explained in this blog post, vertically orienting the current flow removes the horizontal constraints to gates, spaces and contacts dimensions. In this way, the Contacted Gate Pitch can be scaled while maintaining healthy size for all these features. Specifically, the VTFET allows to use larger source/drain contacts to increase the current on the device; the gate length can be selected to optimize device drive current and leakage; and the spacer thickness can be independently optimized for lower capacitance. Another key VTFET feature is the ability to use shallow trench isolation for adjacent circuits, to achieve a Zero-Diffusion Break (ZDB) isolation, with no loss of active-gate pitches. By comparison, the density of conventional lateral-transport FET circuitry is affected by double or single-diffusion breaks required for circuit isolation, which affects the ability to further shrink.
Credit: IBM
