Acquisitions – either officially announced or just rumored about – make up most of our news summary this week. We will then move to some AI chip updates; but first, let’s take a look at one of the EDA announcements that are going to be in the spotlight at this year’s Virtual DAC, running from July 20 to 24.
Early short circuits fixing with Mentor’s Calibre nmLVS-Recon
Mentor has announced the Calibre nmLVS-Recon technology, aimed at speeding overall circuit verification turnaround time by helping designers identify and resolve selected systemic errors early in the development phase. As explained in the announcement’s press release, early design versions typically contain many gross systemic violations. For example, a “shorted nets” class of violation generates millions of errors and is very compute intensive. Circuit verification engineers can use the Calibre nmLVS-Recon short isolation configuration to find and fix these types of violations quickly and efficiently.
