Chips designed in Silicon Valley power the ICT industry around the world, enabling big corporations and startups alike to deliver innovative products and services. Some of these startups are on their way to become “unicorns”, companies that will eventually be valued at $1B or more. An interesting point is finding out which of these future unicorns will find their grazing prairies in Silicon Valley or in other spots within the San Francisco Bay Area, thus enriching the same tech-intensive and capital-intensive environment where many enabling semiconductor technologies come from. Let’s take a quick look at twenty-two of these Bay Area startups, with the help of a list compiled by market research firm CB Insights in collaboration with The New York Times. The original full list includes fifty companies around the world, and a first significant data is that the Bay Area alone makes up almost half of this group of thriving startups.
Fintech
Fintech (financial technology) is the largest category here, with five companies. Blend (San Francisco) is a digital lending platform for mortgages and consumer banking. Carta (San Francisco) helps companies and investors manage equity and ownership, on aspects such as cap tables, valuations, portfolio investments, and equity plans. Earnin (Palo Alto) is a community-supported platform mostly targeted at helping people with services such as protection from bank overdrafts, cash back rewards, immediate access to weekly or monthly salary, negotiation of medical bills. Marqeta(Oakland) offers an open API for payment card issuing, that can be used by companies to build their own payment solutions. Upgrade (San Francisco) is an online lending platform that combines personal loans with free credit monitoring.
IoT edge devices take center stage this week with two significant announcements concerning low power neural processors and a UCSD research work on low power Wi-Fi, the latter presented at the recent ISSCC. Another research from UCSD promises advances in Lithium batteries; and another ISSCC paper describes a new active interposer technology boosting the capabilities of chiplet-based devices.
Arm’s Neural Processing Unit
Arm has recently announced the Ethos-U55, a microNPU (Neural Processing Unit) for Cortex-M, claiming a combined 480x leap in machine learning performance. The new solution targets small, power-constrained IoT and embedded devices. Ethos-U55 key features include the possibility of choosing multiple configurations to target different AI applications; an area of just 0.1mm2 to reduce energy consumption for ML workloads up to 90% compared to previous Cortex-M generations; a unified toolchain (for both Ethos-U55 and Cortex-M); native support for the most common ML network operations including CNN and RNN. Heavy compute operators – such as convolution, LSTM, RNN, pooling, activation functions, and primitive element wise functions – run directly on the Ethos-U55, while other kernels run automatically on the tightly coupled Cortex-M using CMSIS-NN. Several innovations contribute to the dramatic performance increase provided by Ethos-U55. Utilization of MAC engines on popular networks reaches 85%; operator and layer fusion, as well as layer reordering, increase performance and reduce system memory requirements up to 90%; weights and activations are fetched ahead of time using a DMA connected to system memory via AXI5 master interface; the use of an advanced, lossless model compression reduces model size up to 75% etc. Arm partners that have announced support for the new solution include Alif Semiconductor, Au-Zone, Bestechnic, Cypress, Dolby, Google, NXP, Qeexo, Shoreline IoT, and STMicroelectronics.
Eta Compute’s Neural Sensor Processor
Eta Compute has started shipping its ECM3532, an AI multicore processor for embedded sensor applications. Targeted at always-on image and sensor applications at the edge, the ECM3532 contains an Arm Cortex-M3 processor and a DSP for machine learning acceleration. Both cores feature the company’s patented Continuous Voltage Frequency Scaling (CVFS) technique with near threshold voltage operation, to reduce active power consumption down to hundreds of microwatts. The device includes on-chip power management which simplifies the use of CVFS with high-efficiency buck (step-down) converters that generate the required internal voltages. With the ECM3532, Eta Compute is mostly targeting applications such as sound classification, keyword spotting, object detection, people detection, people counting, activity classification, context awareness, defect detection and others. Audio AI applications can take advantage of the chip’s multiple methods of acquiring audio samples – from digital and analog MEMS microphones.
Connecting IoT devices to Wi-Fi with a 28 microwatts power budget
Using a technique called backscattering, an IoT device can take incoming Wi-Fi signals from a nearby device (like a smartphone) or Wi-Fi access point, modify those signals to encode its own data onto them, and then reflect the new signals onto a different Wi-Fi channel to another device or access point. In this way, the IoT device can communicate with existing Wi-Fi networks consuming just 28 microwatts. The innovation comes from the University of California San Diego and has been presented at the recent ISSCC 2020 conference in San Francisco. Transmission data rate is 2 megabits per second over a range of up to 21 meters. Thanks to a wake-up receiver, the solution can spend part of the time in sleep mode absorbing only 3 microwatts.
How backscattering works. Image credit: UCSD
Active interposer enables better chiplet-based devices
Also presented at the ISSCC 2020, a work from French research institute CEA-Leti concerning a 96-core processor that consists of six chiplets placed on top of an active interposer. According to the researchers, conventional large-scale interposer techniques for chiplet integration – such as 2.5D passive interposers, organic substrates, and silicon bridges – have shortcomings on many aspects: long-distance chiplet-to-chiplet communications, integration of heterogeneous chiplets, integration of functions such as power management, analog IP and I/O IP. The active interposer developed by CEA-Leti, instead, integrates voltage regulators, flexible system interconnect topologies between all chiplets, energy-efficient 3D-plugs for dense high-throughput, inter-layer communication, and a memory-IO controller and the physical layer (PHY) for socket communication. The six chiplets – built in 28nm FDSOI CMOS node – are 3D-stacked in a face-to-face configuration using 20µm pitch micro-bumps onto the active interposer embedding through-silicon vias (TSVs) in a 65nm technology node. The device has been designed with a Mentor Graphics 3D CAD tool flow and implemented on a STMicroelectronics process.
Image credit: CEA-Leti
Ultrasound prevents “dendrites” in lithium metal batteries
Lithium metal batteries have twice the capacity of today’s best lithium ion batteries but their lifespan is too short due to the development of needle-like structures called dendrites, that can grow unchecked from the anode towards the cathode causing the battery to short circuit and even catch fire. Researchers from the University of California San Diego have come up with a solution that prevents the development of dendrites: an ultrasound device integrated in the battery, propagating waves that cause the liquid electrolyte to flow – instead of standing still. The ultrasound device is made from off-the-shelf smartphone components and can be used in any battery, including commercial lithium ion batteries, to shorten charging time.
The ultrasound device that prevents dendrites in batteries. Image credit: UCSD
Automotive FuSa solutions
Samsung Foundry has successfully deployed the Synopsys TestMAX XLBIST solution on an automotive integrated circuit to provide dynamic in-system testing for critical failures, in order to meet stringent automotive functional safety (FuSa) requirements concerning automotive safety integrity levels (ASILs) for autonomous driving and advanced driver-assistance systems (ADAS). Using TestMAX XLBIST, Samsung was able to implement dynamic in-system test, which periodically executes during key phases of vehicle operation, including power-on, drive mode, and power-off. Functional safety is also being addressed by Accellera, that has recently announced the formation of a specific Working Group to create a standard that improves interoperability and traceability in the functional safety lifecycle.
Upcoming events
Cancellation of the Mobile World Congress in Barcelona is probably the biggest consequence of the Covid-19 outbreak on tech events so far. Fortunately, other important tech shows are confirmed: as we write (February 21), the Embedded World Conference website says that the event “takes place as planned”, from February 25 to 27. However, some important exhibitors have withdrawn from the Nuremberg, Germany, show. For live updates on the Covid-19 impact on the electronics industry, readers can check this EE Times Europe page. Other IT events planned for next week include the RSA Conference 2020, February 24 to 28 in San Francisco.
End of year earnings calls continue; this week it’s Cadence’s turn, with Lip-Bu Tan sharing some details about 2019 customers. More news from the last few weeks include some announcements concerning memories, with the addition of updates on neural networks applications and startups developing new processors.
Cadence 2019 results
Cadence reported 2019 revenue of $2.336 billion, compared to revenue of $2.138 billion for 2018. On a GAAP basis, the company achieved an operating margin of 21 percent and a net income of $989 million in 2019, compared to operating margin of 19 percent and net income of $346 million for 2018. As for 2020, Cadence expects total revenue in the range of $2.545 billion to $2.585 billion. On a GAAP basis, operating margin is expected to be 21 to 22 percent. During the financial results conference call, Cadence’s CEO Lip-Bu Tan summarized the company’s major achievements for 2019: among them, about 50 new full-flow wins, including one for new advanced node designs with “a leading maker of FPGA chips”; he also mentioned successes in the digital business – with customers such as MediaTek, Samsung, Socionext, Innovium, Mellanox, Uhnder – and a win for the Xcelium parallel simulator at “a leading U.S. computing company”. Cadence IP royalty growth was strong particularly in the audio market, where Tensilica HiFi DSP processors are increasingly being adopted in True Wireless Stereo based earbuds, and in the next generation of smart speakers. In 2019 Cadence entered the System Analysis market introducing the Clarity 3D Solver and the Celsius Thermal Solver, solutions targeted at electromagnetic field simulation and electro-thermal co-simulation respectively; Lip-Bu Tan said that Cadence is “extremely pleased” with the ramp of these innovative products, with well over 90 evaluations underway and more than 20 customers to date, including Micron, STMicro, Kioxia, Realtek, and Ambarella.
Lip-Bu Tan. Image credit: Cadence
Memory updates: Flash, LP DRAM, ReRAM
A quick roundup of some recent memory updates. Kioxia Europe (formerly Toshiba Memory Europe) has successfully developed its fifth generation BiCS Flash three-dimensional flash memory with a 112-layer vertically stacked structure. The new device has a 512 gigabit (64 gigabytes) capacity with 3-bit-per-cell (triple-level cell) technology. Kioxia plans to start shipping samples for specific applications in the first quarter of this year. Micron Technology has delivered what it claims is the world’s first low-power DDR5 DRAM in mass production, to be used in the soon-to-be-released Xiaomi Mi 10 smartphone. The company is shipping LPDDR5 to customers in capacities of 6GB, 8GB and 12GB and at data speeds of 5.5Gbps and 6.4Gbps. Weebit Nano has launched a program to address the needs of discrete memory components based on its ReRAM memory technology. This broadens the work program for Weebit beyond just the “embedded” non-volatile memory market. According to Weebit, discrete memory chips contain larger memory arrays and are more technically challenging than embedded modules, requiring additional development work before reaching productisation. A key element required for discrete memory chips is called a “selector”, which helps to selectively modify specific cells – while the others are not impacted. The work required for the discrete memory chips will be performed by Weebit in co-operation with French research institute Leti.
The new Kioxia BiCS Flash. Image credit: Kioxia
Neural networks-based video compression
Artificial intelligence is gaining traction in image and video compression. Among the machine learning capabilities that Xilinx is offering to professional audio-video market customers, the ‘Region-of-Interest Encoding’ detects faces and features in the video image so that the H.264/H.265 codec integrated in the Zynq UltraScale+ MPSoC can keep video quality high in those areas, and apply a higher compression for backgrounds. But besides distinguishing faces from background, neural networks can be used for compression itself – and Google has announced the new edition of a workshop specifically devoted to this new application. As noted in a Google AI Blog post, in 2015 researchers demonstrated that neural network-based image compression could yield significant improvements to image resolution while retaining good quality and high compression speed. The Third Workshop and Challenge on Learned Image Compression (CLIC) will be held at the CVPR 2020 conference. Researchers will be challenged to use machine learning, neural networks and other computer vision approaches to increase the quality and lower the bandwidth needed for multimedia transmission. This year’s workshop will include a low-rate image compression challenge (squeezing an image dataset to 0.15 bits per pixel) and a P-Frame video compression challenge.
New server processors promising a tenfold efficiency boost
Back in October 2018, the Microprocessor Report analyzed Tachyum’s Prodigy server processor and concluded: “If [Tachyum] can stick to its plan and deliver compelling performance, hyperscale companies will strongly consider [Prodigy] as an alternative to Intel’s Xeon”. Tachyum – a Silicon Valley based semiconductor startup, with R&D development center in Bratislava, Slovakia – has recently taken a new step towards real-world applications: its Prodigy Processor AI/HPC Reference Design will be used in a supercomputer which will be deployed in 2021. True to its name, the new chip promises prodigious performance: as stated in a Tachyum press release, “in normal datacenter workloads, Prodigy handily outperforms the fastest processors while consuming one-tenth the electrical power, and it is one-third the cost. In AI applications, Prodigy outperforms GPUs and TPUs on neural net training and inference workloads, and is orders of magnitude easier to program”. Prodigy, a 64-core processor with a clock speed in excess of 4GHz, is slated for commercial availability in 2021.
Another company aiming to reduce power consumption in datacenters is Triple-1 (Fukuoka, Japan), that has announced the development of an AI processor called Goku which will be fabricated in a 5-nanometer process. As of today, little details are available in the company’s website. Triple-1 is mostly stressing the power efficiency benefits of using a 5-nanometer process and a manually optimized design. According to Triple-1, there are currently no mass-produced AI chips fabricated in a process geometry smaller than 12-nanometer. Goku, too, promises a tenfold improvement in power efficiency, reaching 10 TFLOPS/W. Expected peak performance (half-precision) is 1 PFLOPS (1,000 TFLOPS). Mass production of Goku is scheduled for 2021.
Despite declines, 2019 was Silicon Valley’s second biggest year for investments – according to the recent MoneyTree report (Q4 2019) mainly focused on US investments, jointly released by PricewaterhouseCoopers and CB Insights. Companies based in Silicon Valley or in San Francisco received $47.2 billion in 1,722 deals last year, down from a record $61.0 billion and 1,987 deals in 2018. These figures only include equity financings into VC-backed private companies, which are defined by the report as companies that have received funding at any point from venture capital firms, corporate venture arms, or super angel investors. The Bay Area continues to absorb a large slice of tech investments, but the twenty-seven Silicon Valley-based or San Francisco-based companies that occupy top places in the report’s investment rankings – in categories such as the most valuable US unicorns, largest US deals, top IPOs, top funded companies, top mega-rounds etc. – are not directly related with chipmaking. Some of these companies are big and famous, other are probably not so well known outside their specific markets. Let’s take a quick look at them.
FinTech, real estate tech and more money-related platforms
FinTech (financial technology) and related online services is one of the areas where companies based in the Bay Area took center stage in 2019: among them Bill.com (Palo Alto), Ripple (San Francisco) and Stripe (San Francisco), three different types of online payment platforms. Also in the FinTech group are Chime (San Francisco), that can be described as an Internet banking company, and SoFi (San Francisco), an online loan platform. Real estate tech is another hot industry in the Bay Area; companies in the spotlight include Figure Technologies, HomeLight, Juniper Square, Qualia and Zeus, all based in San Francisco. Figure Technologies offers an online platform for home equity line of credit; HomeLight enables users to choose the best real estate agents in their areas; Juniper Square provides real estate investment management software; Qualia is an online platform for ‘real estate closing’; Zeus is a home rental platform. Also linked to real estate, of course, is Airbnb (San Francisco). To complete the category of money-related services, InsureTech (insurance technology) is another lively area with companies such as Next Insurance (Palo Alto), specializing in online insurances for small businesses.
Digital health, autonomous vehicles and other products
A completely different tech-based industry is digital health, where prominent Bay Area companies cited by the MoneyTree report Q4 2019 include ArsenalBio, GenapSys, Grail and Vir Biotechnology. Let’s take a quick look at them: ArsenalBio (South San Francisco) works on immune cell therapies; GenapSys (Redwood City) manufactures DNA sequencing equipment; Grail (Menlo Park) works on early cancer detection; Vir Biotechnology (San Francisco) is in the business of preventing serious infectious diseases. Moving to industries more closely related to computing, attracting investments in 2019 were Databricks (San Francisco) and Palantir (Palo Alto), active in data analytics and data management respectively; also cited in the report are cybersecurity company Shape Security (Santa Clara), recently acquired by Seattle-based F5; robotic process automation company Automation Anywhere (San Jose); and of course OpenAI (San Francisco). Autonomous vehicles obviously attracted investments in 2019, too, with companies such as Cruise (San Francisco), Nuro (Mountain View), specializing in delivery vehicles, and Zoox (Foster City). Completing the picture, three San Francisco-based companies from various industries: Flexport, an online platform for freight forwarding; Juul Labs, making electronic cigarettes; and Dolls Kill, an apparel e-commerce platform.
Cruise Origin. Image credit: Cruise
Another research from CB Insights, in association with The New York Times, has identified fifty future ‘unicorns’, that is, high-momentum startups likely to be eventually valued at $1B or more. The list obviously includes companies based in the San Francisco bay area, and EDACafe is planning to provide more details about them in the upcoming weeks.
Venture capital: Sand Hill Road still a hot spot
Bay Area venture capital firms played a key role in 2019 – considering all investment geographies, not just Silicon Valley tech companies. According to the MoneyTree report, Sequoia Capital and Andreessen Horowitz, both based in Menlo Park, ranked first and second with $7.4 billion and $6.5 billion of fund raised respectively. A third firm based in Menlo Park, New Enterprise Associates, leads the group of the most active VCs in 2019 with 87 deals. This ranking includes three more Bay Area VCs: Plug and Play Ventures (Sunnyvale), Founders Fund (San Francisco) and Google Ventures (Mountain View). Two more firms must be mentioned among the most active VCs when considering Q4 2019 deals alone: Accel (Palo Alto) and Lightspeed Venture Partners (Menlo Park). Famous Sand Hill Road, where most of the Menlo Park-based VCs are located, is still a hot spot for tech investments.
Upcoming events
Back to silicon, now, with some info on upcoming events. ISSCC (International Solid-State Circuits Conference) will take place from February 16th to 20th in San Francisco, while the Mobile World Congress (MWC) is scheduled for February 24th to 27th in Barcelona, Spain. Same week, February 25th to 27th, for the Embedded World show in Nuremberg, Germany. Next month – March 9th to 13th – the French city of Grenoble will host the DATE Conference; same week for the AI Hardware Summit Europe, taking place in Munich, Germany, on March 10th and 11th. Unfortunately, attendance to some of the events taking place over the next few weeks will probably be impacted by the Coronavirus fear and related air travel restrictions.
