Hungry makers have started tasting the new Raspberry Pi 4 earlier than expected, way before the 2020 scheduled release date. Also making news this week: inference benchmarks to advance the growing machine learning industry; Apple reportedly buying an autonomous vehicle startup; a new candidate for the role of “universal memory”; and a 2.5uW/MHz MCU promising to make batteries a neglectable item.
Raspberry Pi 4 is here
Raspberry Pi 4 is on sale from June 24, starting at $35. According to Eben Upton, Chief Executive of Raspberry Pi Trading, “this is a comprehensive upgrade, touching almost every element of the platform. For the first time we provide a PC-like level of performance for most users, while retaining the interfacing capabilities and hackability of the classic Raspberry Pi line.” Raspberry Pi 4 is built around the Broadcom chip BCM2711, a complete re-implementation of BCM283X on 28nm process. The power savings delivered by the smaller process geometry have allowed Broadcom to replace Cortex-A53 with the more powerful 1.5GHz quad-core 64-bit Cortex-A72 core, yielding performance increases over Raspberry Pi 3B+ of between two and four times, depending on the benchmark. The process change has allowed to overhaul many other elements of the Raspberry design. The new board adopts a more modern memory technology, LPDDR4, tripling available bandwidth; the entire display pipeline has been upgraded, including video decode, 3D graphics and display output to support 4Kp60 (or two monitors at 4Kp30); and the non-multimedia I/O limitations of previous Raspberries have been addressed by adding on-board Gigabit Ethernet and PCI Express controllers. Other onboard features include dual-band 802.11ac wireless networking, Bluetooth 5.0, two USB 3.0 and two USB 2.0 ports. To support Raspberry Pi 4, the organization is shipping a new operating system based on the forthcoming Debian 10 Buster release.
Raspberry Pi 4. Image Credit: Raspberry Pi Trading
The International Supercomputing Conference (June 16-20, Frankfurt, Germany) brought interesting news concerning this strategically important industry, while the 2019 Symposia on VLSI Technology and Circuits (Kyoto, Japan, June 9-14) is one of the sources of several announcements on memory technologies this week. Plus, R&D achievements in car battery technologies and a preview from the upcoming sensor events (Sensor+Test in Nuremberg and Sensors Expo in San Jose, CA, both from 25 to 27 June).
World supercomputer ranking, Nvidia role, and a new challenger
The new edition of the TOP500 supercomputer list is a source of extremely interesting information. For the first time, all 500 systems listed deliver a petaflop or more on the High Performance Linpack (HPL) benchmark. Two IBM-built supercomputers, Summit and Sierra – installed at the Department of Energy’s Oak Ridge National Laboratory (ORNL) in Tennessee and Lawrence Livermore National Laboratory in California, respectively – retain the first two positions on the list, with the Summit system delivering a record 148.6 petaflops. China now claims 291 out of 500 systems, followed by the United States with 116. Japan is in third place with 29 systems, followed by France with 19, the United Kingdom with 18, and Germany with 14. The US, however, still maintain their lead in overall HPL capacity, with 38.4 percent of the aggregate list performance. Chinese supercomputer vendors now have the largest share in the list, with Lenovo claiming 173 systems, followed by Inspur with 71, and Sugon with 63. From a processor perspective, Intel continues to dominate the TOP500 list, with the company’s chips appearing in 95.6 percent of all systems. IBM Power CPUs are in seven systems, followed by AMD processors, which are present in three systems. A single supercomputer on the list, Astra, is powered by Arm processors. A total of 133 systems on the TOP500 list employ accelerator or coprocessor technology, down slightly from 138 six months ago. Of these, 125 systems use NVIDIA GPUs.
The International Supercomputing Conference. Image credit: Prometeus GmbH
The RISC-V Workshop held in Zurich, Switzerland, from June 11th to 13th brought several announcements related to the popular open-source ISA; more news concern partnerships in the DMS and autonomous vehicle area. This week and the next, events are making Long Beach the capital of artificial intelligence; meanwhile, research institutes and universities keep studying semiconductor technology and new materials.
RISC-V ecosystem expanding
Right after crossing the 100-design win threshold, SiFive has announced it raised $65.4 million in a Series D round from a group of investors that now includes Qualcomm Ventures. Another aspect of RISC-V growing traction is the expansion of its ecosystem. Andes Technology has just introduced its RISC-V FreeStart program, promising “an easy and fast way” to build a SoC based on the commercial-grade RISC-V CPU core N22, available for free download. According to Andes, SoC designers using the N22 can skip the verification tasks required by open source RISC-V CPUs, which offer limited features and lack documentation. Supporting designers who plan to use RISC-V is also the goal of the newly formed OpenHW Group, a not-for-profit global organization aiming to boost the adoption of open-source processors. OpenHW Group will pursue this missione by providing a platform for collaboration, creating a focal point for ecosystem development, and offering open-source IP for processor cores. As an example, for RISC-V-based processors, the organization is introducing the CORE-V family of cores, which offers a manufacturability assurance. Inaugural OpenHW sponsors include Alibaba, Bluespec, CMC Microsystems, Embecosm, ETH Zurich (university), GreenWaves, Imperas, Metrics, Mythic AI, NXP, Onespin, Silicon Labs and Thales.
PCI Express 5.0 is here: recently announced specification confirms the expected 32GT/s transfer rates while maintaining low power and backwards compatibility with previous PCI generations. Many more news are coming from different areas as usual, but – with DAC just ended – EDA announcements abound this week. DAC itself is making news, preannouncing that it will co-locate with SEMICON West in July 2020 and July 2021. Events will take place at the Moscone Convention Center in San Francisco.
Cadence news
Cadence has launched its new Cloud Passport Partner Program to give customers an easier path to the cloud when their internal IT teams desire assistance. Customers now have the option to get support from Cadence-authorized cloud enablement providers. Inaugural members include Rescale, Scala Computing and Nimbis Services, as well as academic partners CMC Microsystems and Europractice. Cadence has also announced the Spectre X Simulator, a massively parallel circuit simulator providing up to 10X performance gains, while maintaining the same accuracy of previous Spectre generations. The new tool can solve 5X larger designs, enabling simulation of circuits containing millions of transistors and billions of parasitics in a post-layout verification flow.
