Major themes at DATE Conference: autonomous driving, post-CMOS technologies, Design for Inspection

Juergen Bortolazzi. © DATE 2019

Risking to miss your flight? Save time at the airport by letting your car find a parking place by itself. Much like valet parking, but without a valet. This is the goal of a project from the Volkswagen Group, that Jürgen Bortolazzi from Porsche described in his opening keynote at the DATE Conference – which took place in Florence, Italy, March 25^th to 29^th.

Autonomous driving was one of the key themes at the European event on design and test this year, and it echoed on many other speeches and debates during the conference. Bortolazzi observed that there is a gap between the current SAE level of driving automation, L2 (ADAS systems) and the next level L3 (real autonomous drive), therefore he predicted an intermediate level L2+ with more advanced ADAS. But getting to L3, he pointed out, will require major reductions in cost and power consumption. Autonomous drive takes a huge number of expensive sensors, and such a big amount of on-board processing power that – with the current technologies – car electronics might require water cooling. Bortolazzi also highlighted that China is very well positioned in the quest for autonomous driving, thanks to a comprehensive plan from the Chinese government that includes a regulation framework.

Calling for a tighter collaboration within the semiconductor food chain

Cars are becoming “supercomputers on wheels”, as Charles Janac from Arteris put it during a panel on IP, and this is one of the major factors pushing towards new technologies to replace CMOS – now that Moore’s Law seems to be approaching its physical limits. This theme surfaced in different panels, so opinions from many experts can be combined.

As professor Andrzej Strojwas from Carnegie Mellon University said during a panel on test, quadruple patterning used for the most advanced nodes involves placement errors that are probably a message from Mother Nature, telling us that there are things that we just can’t do. But just how viable are the new alternative technologies today? Opinions differ. Mark Heiligman from IARPA pointed out that – as of today – quantum computing is limited to just a few applications and has a significant overhead due to moving data around; Leon Stok from IBM, on the other hand, in a different panel stressed that the new IBM quantum computer is real and ready to ship to a datacenter near you.

DATE 2019 Plenary Session. © DATE 2019

In the meantime, CMOS is still alive, and may enjoy a longer life if research progresses on many fronts – including the use of new materials. Buvna Ayyagari-Sangamalli from Applied Materials cited cobalt replacing copper in certain application. She also called for a tighter collaboration among all the players in the semiconductor food chain (materials and equipment suppliers, EDA, foundries). In a different panel, Joachim Kunkel from Synopsys observed that this collaboration is inevitably taking place in the development of superchips at the most advanced process nodes, as design often start when the foundry is still tuning the new process and PDKs are not available yet, and development must use many ad-hoc solutions.

Hi-end vs mainstream applications, the gap is widening

Another theme that surfaced in different panels is the widening gap between hi-end superchips and mainstream applications. Antun Domic from Synopsys pointed out that at every new process node the number of new designs is becoming smaller – even though a single design may mean millions of chips, as in the case of smartphones. This is not good from the point of view of making technology advancements available to general applications, as these superchips manufactured in very large volumes enjoy unique economies of scale. Domic also pointed out that over the past few years the increase in processing power (e.g. in datacenters) has been achieved mainly through increased parallelism, but the processing speed of the single core has not grown very much. Many applications, though, would benefit from faster cores, which would also reduce the software cost of parallel computing.

Open source hardware, a much-debated issue

The DATE Conference showed that open source hardware continues to be a much-debated issue in the semiconductor industry. Andrei Vladimirescu from UC Berkeley said that RISC-V will be successful because it provides an open ISA, as opposed to ARM; Greg Yeric from ARM disagreed, hinting at future announcements due next June. Charles Janac from Arteris stressed the differences between hardware and software in the open source world: trust is key for hardware, while software problems can be fixed through an update. Joachim Kunkel from Synopsys observed that the expression “open source” is misleading in the hardware world, as free ISAs have always existed, and all standard-based IPs are open source (e.g. USB interfaces). Speaking of IP in general (not just open source), Andrei Vladimirescu from UC Berkeley stressed the design productivity increase obtained by two solutions developed at Berkeley, the digital hardware generator Chisel and the analog generator BAG.

Design for inspection

A panel at DATE 2019. © DATE 2019

Waiting for post-CMOS solutions to become viable, the industry is confronted with the need to improve yield and reliability at 7 nanometers and below. Andrzej Strojwas from Carnegie Mellon University described a technology developed by PDF Solutions and already used by major foundries: Design for Inspection. Since many manufacturing defects are not detectable by just “looking” at the wafer (not even with an in-line scanning electron microscope), the company has developed a way for embedding electrical test into the wafer itself by adding ad-hoc circuitry in unused areas. A brilliant example of how the industry is prolonging the life of CMOS beyond predictions of imminent demise. No doubt, test is going to be key for the upcoming large chips used in safety-critical applications such as autonomous driving. Jeff Rearick from AMD envisioned a future best-case scenario where chips will be running self-test routines by switching on and off on a regular basis, and “we will stop talking about test as an overhead”.

Almost three hundred carefully selected papers

The conference devoted a “Special Day” (March 27^th) to the theme “Embedded Meets Hyperscale and HPC”. Within that topic, a panel focused on what the datacenter and embedded communities can learn from each other. Panel organizers observed that these two worlds are facing similar challenges, but embedded systems use heterogeneous architectures with specialized co-processors, while HPC and datacenters use massively parallel homogeneous computing resources.

Exhibition booths at DATE 2019.

But of course, the DATE Conference isn’t just about panels: in fact, the core of the event is the papers submitted by academic and industrial researchers around the world. Out of a total of 834 paper submissions received, 202 papers were selected this year for regular presentation and 91 additional ones for interactive presentation. The conference also offered a rich program of tutorials, an exhibition area, and collateral events.

Category: EDACafe Editorial

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