Let’s start with an EDA update that is closely related to the so called “chip war” between China and the U.S. According to an article from South China Morning Post, Chinese EDA company Empyrean has ceded control to its largest state-owned shareholder, China Electronics Corporation (CEC). Empyrean’s board of directors granted CEC full control of the company after the EDA firm was put on a U.S. trade blacklist (the “Entity List”). So Chinese state-owned CEC, once a strategic investor, will reportedly consolidate the financial statements of Empyrean into its own and manage the EDA firm as a direct subsidiary.

Rapidus advancements: process, equipment, EDA collaborations

Recently established Japanese foundry Rapidus has announced several steps towards becoming operational with its 2-nanometer GAA process. Working in partnership, IBM and Rapidus have achieved the capability of building nanosheet gate-all-around transistors with multiple threshold voltages (or multi-Vt), which enable ultra-low threshold voltages for high-performance computing, and higher threshold voltages for low-power computing. The two companies believe Rapidus will be able to produce these chips before the end of this decade. Details of the challenges and solutions can be found here.

Additionally, Rapidus has received and installed an ASML’s EUV lithography equipment at its fab currently under construction in Chitose, Hokkaido, which will be used for the 2-nanometer gate-all-around (GAA) manufacturing. According to the company, this is the first time that an EUV lithography tool will be used for mass production in Japan.

Read the rest of Rapidus advancements; automotive AI updates; CHIPS Act supporting SOI and SiC fabs; Qualcomm-Arm legal battle

Let’s start with a recent press leak: in a bid to win European Union approval of its Ansys acquisition, Synopsys has reportedly offered to sell its Optical Solutions Group to Keysight and also to divest Ansys PowerArtist.

Science meets AI at NeurIPS

Interestingly, artificial intelligence in its current form – which is based on neural networks – is probably the only example of a thriving industry built on a technology that does not have a clear, well defined scientific basis. Neural networks deliver amazing performance, spark the construction of gigantic datacenters, move enormous capitals – still, scientists don’t have a full grasp of what happens inside them. A workshop taking place at the NeurIPS conference – currently running in Vancouver – will address this topic. “While deep learning continues to achieve impressive results on an ever-growing range of tasks, our understanding of the principles underlying these successes remains largely limited,” the workshop organizers wrote in an abstract. “This problem is usually tackled from a mathematical point of view, aiming to prove rigorous theorems about optimization or generalization errors of standard algorithms, but so far they have been limited to overly-simplified settings.” According to these scientists, the “scientific method” in the study of neural networks “has been largely underexplored”. The scientific method, they explain, enables the “empirical analyses of deep networks that can validate or falsify existing theories and assumptions, or answer questions about the success or failure of these models.”

TSMC reportedly in talks for Nvidia Blackwell production in Arizona

TSMC is reportedly in discussions with Nvidia to produce the Blackwell AI chips at the foundry’s new plant in Arizona. Blackwell chips have so far been manufactured at TSMC’s facilities in Taiwan. However, even if produced in Arizona the chips will still need to be shipped to Taiwan for packaging, as the Arizona facility reportedly does not have CoWoS capacity.

Read the rest of NeurIPS; advanced packaging; OCTRAM memory; graphene interconnect; Google’s quantum advancements

The unexpected retirement of Intel’s CEO Pat Gelsinger is clearly this week’s major event, and the December 2 announcement spurred a flurry of analysis, comments and backstories. According to Reuters, Gelsinger was forced out after a meeting when the company board told him that he could retire or be removed. Reportedly, the Intel board lost confidence in Gelsinger’s costly and ambitious plan to transform Intel, as the progress of change was not fast enough. In other words, the board holds Gelsinger responsible for Intel’s recent disappointing results: the reduction of its market capitalization (the Intel stock reportedly lost more than 60% under Gelsinger’s tenure), the significant growth of its capital expenditure, and the troubles still affecting its new Foundry business. A summary of the company’s financial performance, with charts, can be found here.

The outcome of Gelsinger’s attempt to transform Intel begs questions about his IDM 2.0 strategy, a plan which could arguably be summarized as follows: in a few years, making Intel able to compete on par with both Nvidia and TSMC. Was this goal too ambitious and unrealistic? Or was the financial market not patient enough to wait for a feasible strategy to be fully implemented? And, assuming Gelsinger’s strategy was theoretically feasible, was its practical implementation hindered by Intel’s limited “ability to execute”, to use a Gartner term? If so, organizational inefficiencies may have played a role in delaying positive results. Former Cadence CEO Lip-Bu Tan quit the Intel board last August criticizing not just Gelsinger’s strategy, but reportedly complaining about Intel’s “bloated workforce”, its “risk-averse and bureaucratic culture”, saying he believed Intel was “overrun by bureaucratic layers of middle managers who impeded progress at Intel’s server and desktop chips divisions.” And Intel candidly admitted other inefficiencies in June 2023 when it adopted the “internal foundry model”: namely, an excessive use of “expedited” wafers that business units decide to move through Intel’s manufacturing process, which are costly and reduce factory efficiency, and Intel’s test times, which ran “double or triple those of competitors”.

The next Intel CEO, whoever he or she will be, will have to decide not just whether to continue or discard Gelsinger’s IDM 2.0 strategy, but also how to deal with Intel’s inefficiencies – part of which arguably still exist, even though Gelsinger has gone. (By the way: searching for a new CEO, Intel has reportedly approached the above mentioned Lip-Bu Tan, among others). And, as for the future of Intel Foundry, he or she will face an additional complication: reportedly, the company has said that its recent deal for $7.86 billion in U.S. government subsidies restricts its ability to sell stakes in its foundry unit if it becomes an independent entity.

Read the rest of Intel CEO retires; new U.S. restrictions on exports to China; HBM’s growing importance

STMicroelectronics has reportedly announced new plans to partner with Chinese foundry Hua Hong, arguing that having local manufacturing in China is vital to its competitive position as a supplier to the Chinese electric vehicle manufacturers. This undoubtedly legitimate strategy highlights the intricacies inherent in transitioning from the interdependencies of yesterday’s globalization to the current era of geopolitics-driven subsidies and tariffs. It’s worth noting that Europe-headquartered STMicroelectronics will receive a 2 billion euros State subsidy to build a silicon carbide facility in Italy; and that the Chinese electric vehicles imported into Europe are currently subject to EU tariffs.

U.S. CHIPS Act awards: Intel, BAE Systems, Rocket Lab

The U.S. Department of Commerce has awarded Intel up to $7.865 billion in direct funding under the CHIPS Incentives Program’s Funding Opportunity for Commercial Fabrication Facilities. The award follows the previously signed preliminary memorandum of terms, announced on March 20, 2024. This funding will directly support Intel’s expected U.S. investment of nearly $90 billion by the end of the decade. As noted by Reuters, the amount is lower than the $8.5 billion announced in March, after Intel won a separate $3 billion award from the Pentagon. Reportedly, Intel has already met some initial project milestones and will receive at least $1 billion of the CHIPS award before the end of December.

Two other CHIPS Act awards were recently finalized by the U.S. Department of Commerce, both of them to defense/aerospace suppliers. BAE Systems Electronic Systems will receive up to $35.5 million in direct funding, to support the modernization of the company’s Microelectronics Center in Nashua, New Hampshire, and quadruple its production capacity for Monolithic Microwave Integrated Circuits. Rocket Lab, the parent company of SolAero Technologies, will receive up to $23.9 million in direct funding to support the modernization and expansion of the company’s facility in Albuquerque, New Mexico, which will increase the company’s compound semiconductor production by 50% within the next three years. Rocket Lab is one of two companies in the United States that specialize in the production of space-grade solar cells that power spacecrafts and satellites.

Read the rest of Intel to get $7.86 billion CHIPS Act award; Risc-V-based universal processor; SMIC’s yields; Nvidia’s music generation AI model

Artificial intelligence is the common underlying theme in most of the news this week. But first, some CHIPS Act updates.

Biden-Harris administration to finalize some subsidies

Some of the last moves from the Biden-Harris administration include finalizing part of the planned subsidies to support the U.S. semiconductor industry. TSMC Arizona has been awarded up to $6.6 billion to support the company’s planned investment of more than $65 billion in three greenfield leading-edge fabs in Phoenix, Arizona. GlobalFoundries has been awarded up to $1.5 billion to support the expansion of its existing fab in Malta, New York, the upgrading of its existing fab in Essex Junction, Vermont, and the construction of a new fab in Malta, New York. In addition to that, Akash Systems (Oakland, CA) has signed a non-binding preliminary memorandum of terms with the U.S. Department of Commerce under the CHIPS and Science Act to receive over $68 million in direct funding to support the operational ramp-up of its Diamond Cooling semiconductor technologies.

Nvidia accelerates CAE digital twins

Nvidia has announced an Omniverse Blueprint that enables industry software developers to help their CAE customers create digital twins with real-time interactivity. Software developers such as Altair, Ansys, Cadence and Siemens can use the Nvidia Omniverse Blueprint, a reference workflow that includes Nvidia acceleration libraries, physics-AI frameworks and interactive physically based rendering to achieve – according to the company – 1,200x faster simulations and real-time visualization. One of the first applications of the blueprint is computational fluid dynamics simulations. Ansys ran Fluent at the Texas Advanced Computing Center on 320 Nvidia GH200 Grace Hopper Superchips. A 2.5-billion-cell automotive simulation was completed in just over six hours, which would have taken nearly a month running on 2,048 x86 CPU cores.

Read the rest of Nvidia-powered CAE acceleration; new Keysight EDA software; CoWoS roadmap; new datacenter inference solution

Let’s start with a quick geopolitical update: Vietnam is emerging as a destination for new semiconductor-related investments. According to press reports, Foxconn intends to step up its presence in the country to produce integrated circuits, and multiple players – both foreign and domestic companies – are expanding capacity in Vietnam for chip testing and packaging.

EDA updates

Siemens Digital Industries Software has added the Innexis product suite to its Veloce hardware-assisted verification and validation system, to address demand for shift-left software development in the design process of complex SoCs. Currently, the Innexis product suite consists of: Innexis Developer Pro, which provides a connected development flow from virtual to hybrid to full RTL; Innexis Architecture Native Acceleration, a cloud-based high-speed virtual platform; Innexis Virtual System Interconnect, to facilitate the creation and simulation of comprehensive system level digital twin platforms by connecting multi-behavioral virtual and physical subsystems.

Altair PollEx for ECAD, a PCB verification tool, is now available as a one-year free trial. The tool enables engineers – early in the design cycle – to review designs, analyze, verify, and assess physical, logical, and electrical attributes, and detect potential manufacturing and electrical issues. It can also boost production yield with ECAD integration, and ensure collaboration throughout the PCB development process. Altair PollEx for ECAD integrates with major PCB design tools like the ones from Altium, Cadence, Siemens, and Zuken.

Celus’ AI-driven automation has been integrated with Siemens’ PCB design solutions, enabling a workflow that automates routine design tasks like schematic generation. This cooperation aims at enhancing accessibility and efficiency in PCB design for small to medium-sized businesses and independent engineers.

Excellicon has re-engineered its core timing graph engine to address the performance requirements of timing constraints generation and verification in complex SoC designs, characterized by a surge in gate count and the proliferation of clock domains. According to the company, its newly developed Hyper-Graph technology delivers a 3X-5X run time speed improvement over the nearest competitor.

Read the rest of Shifting left software development; advancements in car power architectures; Japan’s semiconductor subsidies; ADI acquires Flex Logix

Will Donald Trump’s victory have an impact on the semiconductor industry? Should the industry expect changes to the CHIPS for America program and/or a different approach in the so-called “chip war” with China and related geopolitical issues? As the world waits for more insights, let’s briefly report some recent updates on both fronts. As for the CHIPS for America program, locations have been selected for the “Extreme Ultraviolet Accelerator”, which will operate within NY Creates’ NanoTech Complex in Albany, New York, supported by an investment of $825 million; and for the “Design and Collaboration Facility”, which will be based in Sunnyvale, California. As for geopolitical tensions, SpaceX has reportedly asked Taiwanese suppliers to transfer manufacturing off the island, because of geopolitical risks; and the British government has reportedly ordered China-registered Future Technology Devices International Holding Ltd to sell 80.2% of Scotland-based chip company FTDI over national security risks.

Siemens-Altair deal

A few days after the acquisition announcement, let’s take a closer look at the Siemens-Altair deal. The announcement press release from Siemens offers a glimpse into how the combined product offering will look like. Altair’s simulation portfolio, with strength in mechanical and electromagnetic capabilities, will enhance Siemens’s Digital Twin to deliver a full-suite, physics-based, simulation portfolio as part of Siemens Xcelerator (which is Siemens’s development platform to help companies become digital enterprises). Altair’s data science and AI-powered simulation capabilities will be leveraged to allow anyone, from engineers to generalists, to access simulation expertise. And Altair’s data science capabilities will boost Siemens’s expertise in product lifecycle and manufacturing processes. Clearly, from a technology point of view, the Siemens-Altair deal is not just about EDA, as both companies offer many software tools targeted at industries other than semiconductors. Altair, for example, also offers HPC & Cloud tools, AEC (architecture, engineering, and construction) solutions, data analytics and more. However, taking EDA only into account, one could see this deal as a way to boost the former Mentor Graphics offering with the addition of Altair’s multiphysics simulation capabilities. From this point of view, the Siemens-Altair deal can be likened to the Synopsys acquisition of Ansys. Also, the Siemens-Altair deal confirms the EDA concentration trend, with the “big three” getting ever bigger.

Read the rest of Siemens-Altair deal; rumored OpenAI-Broadcom chip; 0.017 nm precision in chip stacking; transistors operating at 0.3 volts; Intel backstories