Note: I turn this week’s Bridging the Frontier blog over to Anirudh Devgan, President and CEO, Cadence Design Systems and ESD Alliance Governing Council Member, to give us his view of Computational Software. His viewpoint first appeared in the ESD Alliance newsletter distributed at SEMICON West/DAC. It’s now available on the ESD Alliance website. 
I truly believe this is the golden era of semiconductors. Nearly everything in our lives is becoming digital and everything digital requires semiconductors. Today, the industry is about $500B and is on the path to $1T in the next few years. The overall semiconductor industry has always been cyclical, but I believe it is becoming less so, in fact, it is rapidly becoming a fundamental growth industry.
The generation and processing of data, especially unstructured data, is impacting everything from device compute, to the edge and to the cloud. It is transformational in many ways and has led to the emergence of data-driven algorithms and AI semiconductor compute. The motivation is to process the unstructured data and get intelligence out of it. Technology innovations are enabling waves of new products for many applications such as automotive, mobile, manufacturing, healthcare and even the rise of the metaverse. This fundamental trend will continue for decades, and it’s a thrill to be in the middle of it all.
Another growth driver is systems companies’ in-house semiconductor development to optimize the application architectures to maximize performance, address power efficiencies and improve the safety and security of their end products, plus the added benefit of increased control of their supply chain. Also emerging is a new era of system in a package (SiP) and the creation of chiplets. As Moore’s law matures, this will provide a massive improvement in system performance while focusing on the compute portion that benefits most from new process node technologies. EDA must provide an integrated platform to design and analyze all the aspects of SiP and chiplets, which is quite a challenge, with Die-to-Die IP playing a critical role. Overall these enable designers to combine the benefits of advanced semiconductor node innovation with other architectural changes to increase data processing throughput within power and form factor constraints. (more…)
