Note: As SEMICON West and DAC wind down this week, let’s have a look at a Q&A blog post I did on Metis Microsystems, a member of the ESD Alliance, that appeared on the SEMI Website.
Any chip design group with a project specification that prioritizes improved energy efficiency and performance may want to learn more about Metis Microsystems, a member of the ESD Alliance, a SEMI Technology Community.
This East Coast startup founded in 2017 develops advanced CMOS Memory and Arithmetic component intellectual property (IP) to improve energy efficiency and performance of processors. Metis’ circuit IP harvests a device’s transient data to alleviate circuit limits on CMOS scaling. Applications for the technology are relevant to semiconductor markets limited by compute performance and energy efficiency.
This heady-sounding technology caught my attention, and I was soon seated across from Azeez Bhavnagarwala, Metis’ founder and CEO, at the recent SEMICON West to learn more.
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