Not long ago, Cadence’s Chin-Chi Teng and I had a fascinating discussion about how ML is reshaping EDA and the semiconductor industry, the cloud’s role in the evolution of ML in design and its impact on Moore’s Law. 

The post is a good look at Cadence’s leadership at the technological forefront in incorporating ML techniques in its chip design products. It’s a great reminder as well that Cadence’s President and CEO Dr. Anirudh Devgan will be honored with the 2021 Phil Kaufman Award for Distinguished Contributions to Electronic System Design at an award ceremony and banquet Thursday, May 12.

I hope you’ll join us in honoring Anirudh. Registration details can be found on the 2021 Phil Kaufman Award ceremony and banquet page.

Machine learning (ML) and artificial intelligence (AI) have ushered in tremendous opportunities for faster growth, problem-solving and technological development in the electronic system design ecosystem. Cadence Design Systems, Inc., a member of the ESD Alliance, a SEMI Technology Community, is at the technological forefront in incorporating ML techniques in its chip design products.

I spoke with Chin-Chi Teng, Senior Vice President and General Manager of Cadence’s Digital & Signoff Group, about how ML is reshaping EDA and the semiconductor industry, the cloud’s role in the evolution of ML in design and its impact on Moore’s Law. Teng also offers advice on how engineering students can calibrate their education to prepare to work with this transformative technology and urges them to have fun in the process.

Smith: How is ML changing the EDA industry?

Teng: ML is changing EDA for the better in many ways. It’s more difficult than ever to design chips, and ML is helping by overcoming the complexity, size and technology interdependencies. At the same time, ML is helping our own engineers solve certain classes of EDA algorithm, tool, and flow/solution challenges so that we can deliver even better EDA tools to our user base.
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