It’s going to be a busy and exciting few weeks for the Electronic System Design Alliance (ESD Alliance) and our community at large. Perhaps you might like to join us for our two in-person events.

CEO Outlook

We start with the return of our CEO Outlook Thursday, April 28, in Santa Clara, Calif., with Ed Sperling, editor in chief of Semiconductor Engineering, serving as moderator. Joining him as panelists are Dr. Anirudh Devgan of Cadence Design Systems, Niels Fache from Keysight Technologies, Aki Fujimura of D2S, Siemens EDA’s Joe Sawicki and Simon Segars of Arm.

The in-person event, co-sponsored by Keysight, will be held at Agilent’s Building 5 at 5301 Stevens Creek Blvd. in Santa Clara, Calif., beginning at 5:30pm PDT with a networking reception with food and beverages. The CEO Outlook discussion begins at 6:30pm. It is free for ESD Alliance and SEMI members. Pricing for non-members is $49 per person. Click here for registration information.

The ESD Alliance Annual Membership meeting will be held prior to the start of the CEO Outlook beginning at 5pm. Non-members are welcome to attend if they purchase a ticket for the CEO Outlook.
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Verific is a well-known name within the electronic system design community. Not long ago, its president and COO Michiel Ligthart and I talked about trends in chip design for a post on the SEMI website. It’s posted below in its entirety.

And, a reminder to join us for our CEO Outlook as it returns in-person Thursday, April 28. The hour-long panel starts at 6:30 p.m. and is free for ESD Alliance and SEMI members. Pricing for non-members is $49 per person. Registration: https://bit.ly/3D7QW4a

Alameda, Calif.-based Verific Design Automation, a member of the ESD Alliance, made its name in the electronic system design and semiconductor industry supporting companies ranging from startups to billion-dollar industry leaders such as Synopsys, Cadence, Siemens EDA, Xilinx, Microchip, NVidia, Infineon, Qualcomm, Renesas and Samsung. Its software is used as the front end to design automation tools such as synthesis, simulation, debug, and formal verification.

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Great news for the electronic system design community –– the ESD Alliance CEO Outlook returns Thursday, April 28, in-person in Santa Clara, Calif. Reprising his role as moderator is Ed Sperling, editor in chief of Semiconductor Engineering. Joining him as panelists are Anirudh Devgan of Cadence Design Systems, Niels Fache from Keysight Technologies, Aki Fujimura of D2S, Siemens EDA’s Joe Sawicki and Simon Segars of Arm.

The event, co-sponsored by Keysight, will be held at Agilent’s Building 5 at 5301 Stevens Creek Blvd. in Santa Clara, Calif., beginning at 5:30 p.m. P.D.T with networking, food and beverages. The hour-long panel starts at 6:30 p.m. and is free for ESD Alliance and SEMI members. Pricing for non-members is $49 per person. Click here for registration information.

The ESD Alliance Annual Membership meeting for members will be held prior to the start of the CEO Outlook beginning at 5 p.m. Non-members are welcome to attend if they purchase a ticket for the CEO Outlook.

I’m also pleased to announce a new member of the ESD Alliance, a SEMI Technology Community. Xpeedic of Shanghai, China, and Bellevue, Wash., is noted for addressing challenges across the full spectrum of chip, package and system designs with an EDA simulation platform supporting advanced nodes and packaging to enable next-generation high-frequency, high-speed integrated systems. Its products are powered by its proprietary electromagnetic and circuit solver technologies.

Dr. Feng Ling, Xpeedic’s CEO, noted: “The ESD Alliance is a great platform to promote the EDA industry because it plays an invaluable role in bringing new technologies and new products into the market. Being an ESD Alliance member, we hope to increase the visibility of our technologies and products throughout the semiconductor design ecosystem.”

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I’m pleased to welcome Excellicon as a new member of the Electronic System Design Alliance and know it will benefit from our varied initiatives, networking opportunities and brand exposure through SEMI’s global presence.

Himanshu Bhatnagar, Excellicon’s CEO, agrees. “It’s clear that the ESD Alliance is the hub of the electronic system design ecosystem and important for us to be actively involved. Our technology has been customer proven and we are looking forward to expanding our brand awareness via our membership in the SEMI ESD Alliance.” As a member of the ESD Alliance, Excellicon is also a member of SEMI, the global industry association representing the worldwide electronic product design and manufacturing supply chain.Excellicon hails from Laguna Hills, Calif., and provides EDA software for timing constraints authoring, compiling, verification, formal validation and management using a multi-mode approach. It has capabilities for verification of floor plans and offers the ability to assess viability of various floor plans scenarios and perform what-if analyses.

Welcome Excellicon!

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