If you’re attending DVCon U.S. next week, stop by our tabletop display in the lobby with detailed membership information, including our charter and the wide range of benefits, such as our Market Statistics Service (MSS), technical programs, ongoing initiatives and networking events. We will be available during the DVCon Expo and Reception Monday from 5 p.m. until 7 p.m., Tuesday, March 3, and Wednesday, March 4, from 2:30 p.m. until 6 p.m. DVCon U.S., as always, will be held at the DoubleTree Hotel in San Jose, Calif.

Avery Design Systems Community Membership

Now is a great time for your company to join the ESD Alliance, a SEMI Strategic Technology Community. Just ask anyone from Avery Design Systems (DVCon Booth #605), our newest community member. Already a member of SEMI, the global industry association representing the worldwide electronics product design and manufacturing chain, Avery wanted more involvement in the ESD Alliance because of our focus on the design community.

“Being part of SEMI’s broader mission and global reach is part of the ESD Alliance’s attraction to the design community,” as Chilai Huang, Avery’s president and CEO, said in the news release. “For an emerging company such as Avery, the Export and License Management and Anti-Piracy Committees offer a central resource for informed information to address a variety of vexing issues.” Chilai also noted the ability to receive the detailed Market Statistics Service (MSS) data as another resource to help Avery make engineering and business decisions.
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Who in our community doesn’t relish a success story? That’s why we welcome Jim Hogan and his guest Simon Butler of Methodics for a lively lunchtime success story about bootstrapping a startup into profitability Friday, April 3, from noon until 1:30 p.m.

Jim, Methodics’ board member, and its Founder and CEO Simon will steer their audience through the Methodics’ trajectory and success in creating a new market segment called IP Lifecycle Management –– IPLM, for short –– targeting chip designers. They will explore Simon’s vision and reasons why San Francisco-based Methodics pursued this application space.

As an audience member, you will learn how Methodics expanded the definition of product lifecycle management (PLM) in the Enterprise Software segment into IPLM for a design-centric view of the semiconductor IP lifecycle. PLM, well-known and well-integrated within the mechanical design flow, comes up short for the semiconductor market due to the “high velocity” of semiconductor designs, with vendors struggling to deliver a solution to chip designers. As they will explain, Methodics paved PLM’s “last mile,” allowing for the completion of the “digital thread” from system design all the way to the semiconductor level. And, became profitable along the way.

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