The spectacular news this week from the ESD Alliance’s Market Statistics Service (MSS) that revenue increased 18.9 percent for Q4 2016 will be an exclamation point to next week’s CEO Outlook.

For example, revenue for Q4 in all four geographic regions –– Americas, Europe, Middle East and Africa, and Japan and Asia/Pacific –– increased 18.9 percent for Q4 2016 to $2455 million, compared to $2064.5 million in Q4 2015. All product categories saw fourth-quarter growth. In fact, CAE, Semiconductor IP, IC Physical Design & Verification and PCB/MCM reported double-digit increases. Another positive sign is employment is up 6.6% overall.

CEO Outlook attendees can expect to hear much more about industry opportunities for growth and challenges as Ed Sperling, editor-in-chief of Semiconductor Engineering, moderates the panel of four of our most visible CEOs and Alliance Board Members. They are: Aart de Geus, CEO at Synopsys, Lip-Bu Tan, president and CEO of Cadence, ARM’s CEO Simon Segars and Wally Rhines, chairman and CEO of Mentor Graphics and board sponsor for the MSS.
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Please Note: With regrets, we are postponing the “Energy Policy and Strategy for the IoT Era,” the panel on the new energy rules for PCs from the California Energy Commission Thursday, March 23, due to unforeseen circumstances. Stay tuned for updates.

 After listening to our members who told us they missed the yearly CEO forecast, it’s a pleasure to let you know the ESD Alliance is bringing back an evening with the leaders of our industry. The 2017 CEO Outlook will be held Thursday, April 6, from 6:30pm until 8:45pm at Synopsys in Mountain View, Calif. A private reception for ESD Alliance members only to mingle with speakers will begin at 5:30pm.

Four of our industry’s most visible CEOs will discuss their views on the future of the system design ecosystem in what promises to be a wide-ranging and enlightening panel discussion. The four panelists for the evening are: Aart de Geus from Synopsys, Lip-Bu Tan of Cadence, ARM’s Simon Segars and Wally Rhines of Mentor Graphics. Each will share his views on where the semiconductor industry and system design ecosystem are heading, review trends and point out potential opportunities and danger signs ahead. After brief opening statements about the future of the industry, an interactive audience discussion will follow.
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Fresh from our “Ride with the Verify Seven” evening co-hosted with ESD Alliance member company OneSpin during DVCon, we’re planning our next event with another member company –– Sonics –– Thursday, March 23.

The panel, “Energy Policy and Strategy for the IoT Era,” moderated by Grant Pierce, Sonics’ CEO and chairman of the Alliance board of directors, will outline new energy rules for PCs set by the California Energy Commission (CEC). A panel discussion will look at how these new rules affect the system design ecosystem and how the industry will adapt to them. 

The standards, primed to begin January 1, 2018 and roll out through July 2021, cover desktop computers, notebooks and laptops, small-scale servers, workstations and monitors, the top consumers of electricity in California. Estimates are staggering –– the state reports consumption of about 5,610 gigawatt hours of electricity or 3% of residential electricity use and 7% commercial. The CEC determined something needed to change, even though many manufacturers build seemingly energy-efficient products. The new standards are estimated to save 2,332 gigawatt hours per year and reduce utility bills by more than $370 million, enough energy to power about 350,000 California homes a year while reducing greenhouse gas emissions.
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