Open Source and RISC-V Discussion January 18

Please plan to join us Wednesday, January 18, for a discussion about Open Source and the RISC-V processor featuring Jim Hogan of Vista Ventures, Rick O’Connor, executive director of the RISC-V Foundation, and Yunsup Lee, SiFive’s chief technology officer (CTO). They will describe the path from inception to the open source RISC-V ecosystem, explore whether an open source architecture is appropriate for IoT processing needs and what that means for startups and innovation.

As you’ll hear them say, the number of IoT designs is growing at an astronomical pace. IoT devices are capable of sensing the real world. They are prevalent at the edge of the internet, communicating with an external host to process that real-world information. While there are advantages in performance and cost in processing the data locally, doing so requires significant processing capability at low-energy utilization. Systems designed with autonomous local intelligence have increased but require a microcontroller that can run software that takes energy. What emerged from the academic community are open source alternatives such as RISC-V from UC Berkeley that’s gained momentum over the last few years.

About our speakers:

• Jim Hogan, as many of you know, graciously agrees each year to do a series of conversations like this one for the ESD Alliance. Jim has worked in the semiconductor design and manufacturing industry for more than 40 years, gaining experience as a senior executive and board director in EDA, IP, semiconductor equipment, material science and IT companies.
• Rick O’Connor is executive director of the RISC-V Foundation, a non-profit consortium chartered to standardize, protect and promote the free and open RISC-V instruction set architecture together with its hardware and software ecosystem for use in all computing devices.
• Yunsup Lee is SiFive’s CTO and co-founder. He received his PhD degree from UC Berkeley, where he co-designed the RISC-V instruction set architecture and the first RISC-V microprocessors, and led the development of the Hwacha decoupled vector-fetch extension.

The event will be held from 6 p.m. until 8:30 p.m. at Cadence Design Systems (Building 10) in San Jose, Calif. Light snacks and beverages will be served during the networking hour from 6 p.m. to 7 p.m. It is open to all ESD Alliance member companies free of charge, though seating is limited. Non-ESD Alliance members are welcome to attend on a first-come, first-served basis. The cost is $40, payable online or at the door. To register, go to: http://conta.cc/2hJsCeg. The annual ESD Alliance “members only” business meeting will precede the discussion at 5 p.m.

The evening is sponsored by the ESD Alliance’s Emerging Companies Committee. Thanks to its chair Steve Pollock, vice president of sales and marketing at AiPac, Inc., for organizing it. Thanks, too, to Julie Rogers, our director of marketing and operations, and Paul Cohen, our member of the technical staff. It wouldn’t be possible without them.

If your company would like to join the ESD Alliance or learn more about membership, please take a look at our latest newsletter or visit the ESD Alliance website to read about our committees and ongoing initiatives. I’m available to answer questions as well and can be contacted at bob@esd-alliance.org.

Happy Holidays!

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