What's PR got to do with it? Ed Lee
Ed Lee has been around EDA since before it was called EDA. He cut his teeth doing Public Relations with Valid, Cadence, Mentor, ECAD, VLSI, AMI and a host of others. And he has introduced more than three dozen EDA startups, ranging from the first commercial IP company to the latest statistical … More » 3D in Monterey Next WeekMarch 29th, 2012 by Ed Lee
This event is happening next week! Worth signing up if you can get down EDPS is coming up again! It’ll be held April 5-6, 2012 at the Monterey Beach Hotel in Monterey California. This year, the 3D topic will be the focus of day two. First and foremost, Riko Radojcic, director of engineering at Qualcomm, will be talking about the 3D IC roadmap as the keynote speaker on day two. (see his views on 3D standards: http://www10.edacafe.com/blogs/ed-lee/2011/04/11/riko-radojcic-on-3d-standards/ Following the 1-hour keynote will be four 1/2 hour talks on various specific 3D-related topics: * Stephen Pateras of Mentor on BIST for 3D ICs * Arif Rahman of Altera on FPGA design challenges, presumably 3D ones * Marc Greenberg of Cadence on the wide-IO standard for putting memory stacks on processors * Sandeep Goel of TSMC and Bassilios Petrakis of Cadence on an end-to-end test flow for 3D IC stacks Then there’s a lunch panel on 3D, moderated by Steve Leibson of Cadence, with these panelists addressing: The short-, medium and long-term path to the 3D Ecosystem. * Herb Reiter * Samta Bansal of Cadence * Dusan Petranovic of Mentor * Deepak Sekar of Monolithic 3D * Steve Smith of Synopsys * Phil Marcoux of PPM Associates Herb is arguably the primary 3D observer and advocate on what technologies have to be in place to handle the upcoming 3D challenge that’s starting to hit designers now. John Swan is the General Chair of EDPS 2012. Herb Reiter is the Session Chair for the keynote, four shorter presentations and the panel discussion during “3D Day”, Friday, April 6. Very worthwhile to attend if you can get the time off. Tags: 3D, 3D Ecosystem, 3D IC, Altera, Arif Rahman, Cadence, Chip Design, chip designers, DAC, Deepak Sekar, Dusan Petranovic, EDA, eda 2 asic Consulting, EDPS, Electronic Design Automation, Electronic Design Process Symposium, Herb Reiter, IEEE, John Swan, Marc Greenberg, Mentor, Monolithic 3D, Phil Marcoux, PPM Associates, Riko Radojcic, Samta Bansal, Sandeep Goel, semiconductors, Stephen Pateras, Steve Leibson, Synopsys, TSMC |