Custom Layout Insights 
Graham Etchells, Director of Product Marketing at Synopsys
Graham Etchells started in EDA before it was termed EDA. He has held marketing and sales positions at several companies and has been chasing the holy grail of analog/custom layout automation ever since he was a marketing director at Cadence in the mid-1990s. He says past experience indicates we may … More » Custom Compiler In-Design Assistants (Part 1)June 18th, 2016 by Graham Etchells, Director of Product Marketing at Synopsys
On-line Design Rule Checking (DRC) is nothing new. The technology has been in use for years in a variety of different layout editors and yet nearly every layout engineer has a love/hate relationship with it. Why? Well it really comes down to the use model and the responsiveness of the application. At the beginning of the design process, layout engineers love on-line DRC. But as the design progresses, the relationship begins to sour. The problem is that as the layout gets bigger and more complex, the performance invariably starts to fall off until it reaches a point where it becomes unacceptable and the layout engineer simply turns it off and resorts to running the occasional batch checks. To really be effective, on-line DRC has to be an interactive tool that is run often during the layout process, so, as such it needs to have a simple use model and have a fast response. The engine needs to be ‘built-in’ to deliver the required performance and the feedback needs to be comprehensive enough to enable the layout engineer to quickly fix the violation. Custom Compiler’s In-Design Assistants have been architected with both performance and use model in mind. The use model is simple. Whatever is visible in the active viewport is what gets checked. That way the layout engineer can easily control which portions of the design are being checked. In addition, the In-Design Assistant has a GUI to control which type of checks you want to do and also lets the layout engineer set up a group of checks and save them off for future reuse. For example, the layout engineer can save off a set of checks for poly and another set for metals. The built-in DRC engine is lightweight and extremely fast, with results delivered in mere seconds. Violations are viewed via an error viewer and the layout engineer can simply select which type of violation to view in more detail. Details of the type of violation and the objects associated with it are displayed in the Marker index panel. When an object associated with that violation is selected from that panel, the error viewer automatically zooms to the error marker in the layout window. Holding the cursor over the marker in the layout window also gives the layout engineer details of the violation using the actual description of the violation that was specified in the rules file. Displaying the information in this way makes it easy to determine what to do to fix the violation. Figure 1 below shows the violation marker and details of the metal violation.
Figure 1. Violation marker and details of the metal violation Custom Compilers’ In-Design Assistant for DRC is a fast, simple-to-use checker that can be easily customized to check different rule categories, and, when used interactively during the layout process, catch errors that can be quickly fixed while the design is evolving vs. waiting for a batch DRC run to complete. Layout engineers love it! Check out the In-Design Assistant webisode to see its DRC in action. Or watch the full Custom Compiler webinar for an introduction to how the tool works. Next time, we’ll take a look at another In-Design Assistant. Tags: Custom Compiler, custom IC design, custom layout, design rule checking, DRC, EDA, FinFET, In-Design Assistant, Synopsys, violation, visually-assisted automation |
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