Archive for the ‘TySOM Boards’ Category
Friday, March 12th, 2021
 While immunization vaccines are rolling out at an impressive pace, and as society slowly reopens, our best defense against the Coronavirus continues to be early detection and rapid response (such as self-isolation).
An early symptom of having the virus is an increased body temperature, which can be easily measured using contactless methods such as thermal sensors or cameras sensitive to IR radiation.
However, general purpose cameras still have a role to play – in augmenting and putting into better context the thermal data.
Imagine two cameras – one IR and one standard – observing the entrance to a place of work or indoor public venue. If the image captured by the standard camera feeds a system with face detection software, then the thermal image can be made more meaningful: yes, that heat source is a human face.
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Tags: AI, Computer Vision, COVID-19, embedded, FPGA, Gstreamer, IR, Linux, MPSoC, Zynq
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Tuesday, June 16th, 2020
 Everyday there are new devices appearing in homes, offices, hospitals, factories and thousands of other places that are part of the Internet-of-Things (IoT). Clearly, they need to be connected to the internet and there is a need for a huge amount of raw data to be collected , stored and processed on the cloud.
There are many data centers available to store the data. However, only some provide features specifically for IoT applications. One of the most complete cloud-based IoT services available is Amazon Web Services (AWS) IoT Greengrass. It enables edge devices to act locally on the data networked devices generate, and provides secure bi-directional communication between the IoT devices and the AWS cloud for management, analytics and storage.
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Tags: AWS, AWS IoT Greengrass, embedded, FPGA IoT, IoT Greengrass, Zynq development board, Zynq for IoT, Zynq SoC
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Tuesday, April 7th, 2020
 Achieving higher resolution is a never-ending race for camera, TV and display manufacturers. After the emergence of 4K ultra high definition (Ultra HD) imaging in the market, it became the main standard for today’s multimedia products. 4k Ultra HD brings us bigger screens which give an immersive feeling. With this standard, the pixilation problem was solved in the big screens. 4K consumers are everywhere, from live sport broadcasting to video conferencing on our mobile devices. There are, however, many technical challenges in developing systems to process 4k Ultra HD resolution data. As an example, a 4K frame size is 3840 x 2160 pixels (8.5 Mpixel) and is refreshed at a 60Hz, equating to about 500 Mpixel/sec. This requires a high-performance system to process 4k frames in real time. Another bottleneck is power consumption particularly for embedded devices where power is critical. Being low power yet high performance, FPGAs, have shown a strong potential to tackle these challenges. In this blog, you’ll learn all you need to know to start developing a 4K video conferencing project using FPGAs.
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Tags: 4K video Processing, embedded, FPGA Image Processing, FPGA Video Processing, Zynq MPSoC FPGA
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Wednesday, February 19th, 2020
Have you ever worked on a group project where you had to combine your work with that of a colleague of a different engineering discipline but the absence of an efficient means of doing so affected the project’s overall outcome? Well, for software and hardware engineers developing an SoC, the merging of their respective engineering efforts for verification purposes is a big challenge.
Early access to hardware-software co-verification allows hardware and software teams to work concurrently and set the foundation to a successful SoC project. However, many co-emulation methodologies are based on processor virtual models which are not accurate representations of the design. Fortunately, Aldec has a solution that integrates an ARM-based SoC from Xilinx, specifically a Zynq UltraScale+ MPSoC, with the largest Xilinx UltraScale FPGA. Since the Zynq device includes the hard IP of the ARM processor, our solution provides an accurate representation of the ARM-based SoC design for co-verification.
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Tags: ARM, asic, embedded, Emulation, FPGA, HES-DVM, SoC, SoC and ASIC Prototyping, Validation, verification, Zynq
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Thursday, January 25th, 2018
 A high-performance router is an absolute must if you want to run a high-traffic network in which different devices need to transfer and receive data as fast as possible. A router with a powerful processor and sufficient local memory reduces data hiccups and minimizes message loading and buffering times. But is that enough?
Because of the huge amount of data that people now generate – combined with the wealth of communication protocols, such as Wi-Fi, Ethernet, USB, SFP, QSFP – high-performance, hardware re-programmable routers are becoming popular. That hardware re-programmability is being delivered through FPGAs, and utilizing one as the main ‘processor’ on the router makes it easy to add or modify desired modules such as encryption and compression.
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Tags: acceleration, design, digital, embedded, Emulation, FPGA, hardware, industrial, prototyping, SoC, SoC and ASIC Prototyping, Xilinx
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Tuesday, October 17th, 2017
 Creativity and innovation, which lead the society to success, rest on the foundational institutions such as schools and universities. They provide fertile soil to seed, grow and flourish enterprises. To harvest more within an industry, the ecosystem needs to be enriched where the seeds are grown. Considering that the university’s courses are the nutrition to student, they need to be designed in a productive manner as they will provide the next generation of engineers. By providing the necessary platform in addition to the rich and informative tutorials, the quality of the input information for students would be assured. Particularly in the field of Electrical and Computer Engineering, it is important that students get as much hands on experience as possible, and tackle design challenges – such as HW/SW co-design and co-verification – before entering the job market; for their own benefit as well as the industry as a whole.
In this blog, you will become familiar with the TySOM Education kit (TySOM EDU) package designed for the university courses related to hardware design and embedded system design researches.
The TySOM EDU contains a TySOM embedded development board, Riviera-PRO advanced hardware simulator and informative tutorials and reference designs. Although it is possible to choose any development board from the TySOM embedded development board family, the TySOM-1A-7Z010 would be the most cost-effective solution for most university projects.
TySOM-1A-7Z010 (ZynqTM) is a ready-to-use and feature-rich embedded development board which provides the required peripherals to tackle both basic and advanced Zynq-based projects. The XC7Z010 is based on the Xilinx® All Programmable System-on-Chip (SoC) architecture, which integrates a dual-core ARM Cortex-A9 processor with Xilinx 7-series Field Programmable Gate Array (FPGA) logic. Coupling the device to a rich set of peripherals for connectivity, communication and multimedia, makes this board ideal for university projects requiring HW/SW co-design. For the rest of this article, visit the Aldec Design and Verification Blog.
Tags: co-simulation, design, digital, embedded, FPGA, HDL, prototyping, Riviera-PRO, simulation, SoC, university, Xilinx
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Thursday, September 14th, 2017
 Imagine traveling back in the time to the early human ages. It’s going to be both scary and interesting when you meet a person who probably cannot speak or if they do you won’t be able to understand them. Clearly, communication will not be possible until you find a mutual way to convey your respective meanings/intentions. The same principle applies in the world of electronics as there are various types of interfaces among electronic devices. Therefore, a standard communication protocol eases the transformation of data in a system, especially in a System-on-Chip (SoC) system which consists of different systems.
SoC FPGAs such as Xilinx® Zynq™ establishes the ARM Advanced Microcontroller Bus Architecture (AMBA) as the on-chip interconnection standard to connect and manage the functional blocks within the SoC design. The Advanced eXtensible Interface (AXI) is designed for FPGAs based on AMBA as a protocol for communication between blocks of IP.
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Tags: Accelerator coherency port, ARM, AXI interconnection, AXI Lite, AXI memory map, AXI stream, embedded, FPGA, General purpose interface, High Performance interface, SoC, TySOM, Xilinx, Zynq
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Friday, August 25th, 2017
 The history of System-on-Chip (SoC)
Do we prefer to have a small electronic device or a larger one? The answer will often be “the smaller one”. However, before the commercialization of small radios, many people were interested in having big radios for the extravagance. Subsequently, at the beginning of the emergence of compact radios, those who preferred the flamboyance of large radios refused using compact radios. Slowly, but surely, the overwhelming benefits of owning a more compact radio led to the proliferation of smaller devices. These days the progression of the technology enables cutting-edge companies to encapsulate different parts of a system into increasingly smaller devices, all the way down to a single chip, which added the System-on-Chip (SoC) concept to the electronics world. By way of an example of a SoC, I will explain the Zynq-7000 all-programmable SoC. It consists of two hard processors, programmable logic (PL), ADC blocks and many other features all in one silicon chip.
Before the invention of the Zynq, processors were coupled with a Field Programmable Gate Array (FPGA) which made communication between the Programmable Logic (PL) and Processing System (PS) complicated. The Zynq architecture, as the latest generation of Xilix’s all-programmable System-on-Chip (SoC) families, combines a dual-core ARM Cortex-A9 with a traditional (FPGA). The interface between the different elements within the Zynq architecture is based on the Advanced eXtensible Interface (AXI) standard, which provides for high bandwidth and low latency connections.
Before implementing the ARM processor inside the Zynq device, users were using a soft core processor such as Xilinx’s Microblaze. The main advantage of using Microblaze was, and remains, the flexibility of the processor instances within a design. On the other hand, the inclusion of hard processor in Zynq delivers significant performance improvements. Also, by simplifying the system to a single chip, the overall cost and physical size of the device are reduced.
Zynq Design Flow
The design flow for the Zynq architecture has some steps in common with a regular FPGA. The first stage is to define the specifications and requirements of the system. Next, during the system design stage, the different tasks (functions) are assigned to implementation in either PL or PS which is called task partitioning. This stage is important because the performance of the overall system will depend on tasks/functions being assigned for implementation in the most appropriate technology: hardware or software. For the rest of this article, visit the Aldec Design and Verification Blog.
Tags: ARM, embedded, FPGA, hardware, SoC and ASIC Prototyping
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Tuesday, October 4th, 2016
The Internet of Things (IoT) has become the main topic in the technological world; it seems everybody is talking about it as the next wave in electronic systems. The scope of the IoT is so wide now, some have suggested changing the name to the Internet of Everything. We now expect all devices we use in our personal and professional lives to be connected, starting from the obvious ones in smartphones and computers, going through wearables, smart home and security devices, to industrial automation applications, and of course automotive electronics.
Creating devices for the IoT is a big challenge for engineering teams at the design and verification levels, but also at the application and data levels. As all those devices (already estimated to number in the billions, and growing) start generating their data, IoT gateways and infrastructure will need to experience a new revolution. Clouds and data farms will become a common medium not only for data storage and message exchange, but also for processing and analytics which will require much more specialized computing power.
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Tags: Active-HDL, fpga acceleration, FPGA Design, internet of things, programmable soc, SoC and ASIC Prototyping, tysom board, tysom gateway, xilinx zynq soc
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While immunization vaccines are rolling out at an impressive pace, and as society slowly reopens, our best defense against the Coronavirus continues to be early detection and rapid response (such as self-isolation).
