How to Design the New Generation of Reprogrammable Router/Switch Using Zynq FPGA

A high-performance router is an absolute must if you want to run a high-traffic network in which different devices need to transfer and receive data as fast as possible. A router with a powerful processor and sufficient local memory reduces data hiccups and minimizes message loading and buffering times. But is that enough?

Because of the huge amount of data that people now generate – combined with the wealth of communication protocols, such as Wi-Fi, Ethernet, USB, SFP, QSFP – high-performance, hardware re-programmable routers are becoming popular. That hardware re-programmability is being delivered through FPGAs, and utilizing one as the main ‘processor’ on the router makes it easy to add or modify desired modules such as encryption and compression.

Since the importance of decision-making and hardware acceleration is relatively high in routers, the Xilinx® Zynq™ FPGA is a good option, because it has an ARM processor core and an FPGA integrated into a single chip which can boost the decision-making and hardware acceleration processes. In this regard, Aldec offers a networking solution based on the Xilinx® Zynq™ FPGA. In this solution, a router/switch is designed using TySOM-2A-7Z030 embedded development board and an FMC-NET daughter card (figures 1 and 2, respectively).

Figure 1: TySOM-2A-7Z030	Figure 2: FMC-NET

Together the board and daughter card have six Ethernet connectors, two Wi-Fi/Bluetooth channels, one QSFP+ connector and four SATA connectors. The Ethernet connectors can be used for connecting laptops and PCs to the network. The USB ports can be used to connect external devices such as Hard Drives and printers to the network.

The QSFP+ connectors can be used for high speed data transactions such as transferring data between the server and the network. The SATA connectors can be used for adding traditional hard drives and/or SSDs to the network. Figure 3, shows the setup for the described router. To dig more into this design, let’s divide the Xilinx® Zynq™ structure to PS and PL. In the PS side, the ARM processor runs the OpenWrt Linux distribution which controls all the devices. OpenWrt is chosen because it provides a fully writable file system with package management; instead of trying to create a single, static firmware. This frees you from the application selection and configuration provided by the vendor and allows you to customize the device through the use of packages to suit any application. For more information about OpenWrt, visit OpenWrt webpage.

For the rest of this article, visit the Aldec Design and Verification Blog.

Tags: acceleration, design, digital, embedded, Emulation, FPGA, hardware, industrial, prototyping, SoC, SoC and ASIC Prototyping, Xilinx

Categories: FPGA Design, SoC Design and Validation, TySOM Boards

This entry was posted on Thursday, January 25th, 2018 at 1:57 pm. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.