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 Aldec Design and Verification
Dr. Stanley M. Hyduke
Dr. Stanley M. Hyduke
Aldec Founder/CEO - Born in Poland, Dr. Hyduke received his Master of Science in Telecommunications Degree in 1962 from Technical University of Wroclaw, Poland and obtained his Doctorate from Kharkov Technical University in Ukraine. Dr. Hyduke held positions at EDO Commercial Corporation, Control … More »

Much has changed in the last 30 years

 
January 10th, 2014 by Dr. Stanley M. Hyduke

When I first launched Aldec in 1984, home computers hadn’t quite taken off and innovations such as the compact disk and those oversized, power draining cellphones were still struggling to obtain mass acceptance.

Fast forward 30 years, even those of us in the electronics industry have whiplash from the speed at which technology is advancing and delivering new products. Buyers are more eager to become early adopters of innovative new technology, and smarter, faster tools are required to keep pace.

As a long-time member of the Electronic Design Automation (EDA) community, Aldec has had a front row seat to the technology race and over the years we have celebrated many successes of our own. Here, our product managers reflect on some of our most memorable highlights from 2013.

“We continued to enhance Riviera-PRO’s debugging tool suite with new tools for UVM-based verification environments such as class hierarchy visualization, dynamic object debugging and visualization. Riviera-PRO continues to win over new users, and will keep delivering helpful new tools like ‘UVM Graph’ in 2014.”

“Our 90’s kid Active-HDL celebrated its Sweet 16 and still continues to win awards as the popular choice for FPGA designers thanks to its global project management, powerful simulation performance, documentation and debugging tools.”

For the rest of this article, visit the Aldec Design and Verification Blog.

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Categories: Emulation/Acceleration, FPGA Design, Functional Verification, Requirements Management, SoC Design and Validation, Specialized Applications

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