The last month has been busy for all of us at Agnisys, with three important virtual events. As I previewed in my last post, we held our first Agnisys User Group Educational Roundtable (AUGER) on March 18. We had a great event enhanced by lots of interaction with our users. Prior to that, we presented the paper “ML-Based Verification and Regression Automation” and the short workshop “RISC-V Based SoC Design, Verification and Validation in One Hour” at the annual Design and Verification Conference (DVCon) U.S. We also participated for the first time in DVClub Europe, where I discussed “Automating IP and SoC Verification.”
As part of preparing for these events, we took a step back and thought from the top down about the role we are playing in the industry today and the directions we can take in the future. We have expanded our original focus on register automation to encompass specification-driven design, verification, embedded programming, validation, and documentation of IPs and SoCs. This expansion is testament both to our growth as a company and to the many challenges faced by semiconductor development teams. Sheer complexity is the most obvious issue; today’s designs contain billions of gates with thousands of blocks and countless interconnections.
