Despite increasing costs of development, IC manufacturers are still making great strides.

The success and proliferation of integrated circuits has largely hinged on the ability of IC manufacturers to continue offering more performance and functionality for the money. Driving down the cost of ICs (on a per-function or per-performance basis) is inescapably tied to a growing arsenal of technologies and wafer-fab manufacturing disciplines as mainstream CMOS processes reach their theoretical, practical, and economic limits. Among the many levers being pulled by IC designers and manufacturers are: feature-size reductions, introduction of new materials and transistor structures, migration to larger-diameter silicon wafers, higher throughput in fab equipment, increased factory automation, three-dimensional integration of circuitry and chips, and advanced IC packaging and holistic system-driven design approaches.

For logic-oriented processes, companies are fabricating leading-edge devices such as high-performance microprocessors, low-power application processors, and other advanced logic devices using the 14nm and 10nm generations (Figure 1). There is more variety than ever among the processes companies offer, making it challenging to compare them in a fair and useful way. Moreover, “plus” or derivative versions of each process generation and half steps between major nodes have become regular occurrences.

San Jose should be hopping next week as chip design verification enthusiasts from all over arrive for the annual DVCon conference and exposition that runs Monday through Thursday, February 26-March 1, at the DoubleTree Hotel.

If you plan to attend, stop by our tabletop in the foyer directly across from the entrance to the exhibit area. You can find out about the ESD Alliance’s charter, programs, initiatives and ongoing events. Exhibitors and attendees can pick up copies of its latest newsletter and giveaways for members and companies interested in joining.

While Monday’s a full day of tutorials, attendees will stick around for the DVCon Expo and Reception that will be held from 5 p.m. until 7 p.m. The exhibit floor is open Tuesday, February 27, and Wednesday, February 28, from 2:30 p.m. until 6 p.m. as well. The tutorial program continues Thursday.

Intel far surpasses others with R&D spending of $13.1 billion in 2017 and accounts for 36% of expenditures among Top R&D spenders.

The ten largest semiconductor R&D spenders increased their collective expenditures to $35.9 billion in 2017, an increase of 6% compared to $34.0 billion in 2016. Intel continued to far exceed all other semiconductor companies with R&D spending that reached $13.1 billion. In addition to representing 21.2% of its semiconductor sales last year, Intel’s R&D spending accounted for 36% of the top 10 R&D spending and about 22% of total worldwide semiconductor R&D expenditures of $58.9 billion in 2017, according to the 2018 edition of The McClean Report that was released in January 2018. Figure 1 shows IC Insights’ ranking of the top semiconductor R&D spenders, including both semiconductor manufacturers and fabless suppliers.

Figure 1
Intel’s R&D expenditures increased just 3% in 2017, below its 8% average annual growth rate since 2001, according to the new report. Still, Intel’s R&D spending exceeded the combined R&D spending of the next four companies—Qualcomm, Broadcom, Samsung, and Toshiba—listed in the ranking.

Nowadays, most embedded systems are built using 32-bit CPUs. These devices give plenty of scope for performing the arithmetical processing required for various applications. Calculations can be performed on signed or unsigned integers and 32 bits gives a good range of values: +/- 2 billion or up to 4 billion respectively. Extending to 64 bits is reasonably straightforward.

If you need to stray outside of these ranges of values or perform more sophisticated operations, then you need to think in terms of floating point and this presents a range of new challenges …