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Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at She can be reached at peggy at aycinena dot com.

NVM: Kilopass unplugged

January 31st, 2013 by Peggy Aycinena

Not surprisingly, Silicon Valley based Kilopass Technology continues to advocate for non-volatile memory, in particular the company’s VCM [Vertical Cross-point Memory] bit-cell technology. In a recent phone call with Andre Hassan, Field Marketing and Applications Director at the company, we discussed why Kilopass see the future going their way.


WWJD: In 25 words or less, what is NVM?

Andre Hassan: Non Volatile Memory [NVM], at least the Kilopass version, is a one-time programmable standard CMOS process anti-fuse memory that maintains its contents through power down.

WWJD: When did volatile memory become King of the Hill?

Andre Hassan: With the introduction of SRAM and DRAM from companies like IBM and Intel in the late 1960’s.

WWJD: When will NVM mean just memory and not a special form of memory?

Andre Hassan: Actually it started out that way with magnetic core memory in the mid-1950s. Since then, the industry has tried to come back to it multiple times. It’s the holy grail that people have been chasing as long as I’ve been in the industry.

In the long term, the key challenge in the technology is embedded NVM. We are making important strides here. Kilopass designs and licenses embedded NVM, which means our customers are able to optimize their designs to standard processes from fabs like TSMC, UMC, SMIC, and GlobalFoundries, using pure logic processes.

The most important development of the pure-play foundries is focused on logic; adding special modules for exotic memory is too expensive. Before we see embedded exotic NVM on pure-play foundries, standard memory suppliers will have to achieve the same operating margins as foundries.

WWJD: I heard a SanDisk exec give a keynote last year at ISSCC claiming credit for all of Steve Jobs’ success with the iPod/iPhone/iPad because Apple couldn’t move forward with those products until SanDisk finally delivered on their promise of a viable NVM for mobile products. What do you think?

Andre Hassan: It depends, as always, on the spin you want to put on things. For a new generation of semiconductor professionals, that story may ring true. But for those of us who have been around long enough, we can’t credit SanDisk alone since Toshiba among others would have a lot to say about that.

WWJD: Does Kilopass have a different target market than SanDisk?

Andre Hassan: We focus on embedded NVM, anything that can be built on pure standard logic, anything that can be built into an SOC. An optimized flash memory – the other technology you heard referenced in the ISSCC keynote – is not practical in an embedded process. And, there are two parts to that practicality.

First, you have to add a Flash process to the standard CMOS bulk process, but merging the two adds 50 percent to the cost, as well as presenting technical challenges, such as materials and thermal cycling. Second, you can’t get a merged process below 65 nanometers. If you’re trying to build a 28-nanometer SOC, you can’t get embedded Flash on it.

WWJD: In that case, is it Kilopass to the rescue? Is that the Kilopass elevator pitch?

Andre Hassan: Our technical elevator pitch is simplicity, a standard ASIC design flow, standard CMOS processes, no additional costs, and successfully scaling from 180 down to 20 nanometers – and we fully expect to go to 14 nanometers.

WWJD: It all sounds great, so what’s wrong with the industry that they’re not thinking solely in terms of Kilopass?

Andre Hassan: They are listening and they are using our technology, but what is important is to highlight how NVM is used in embedded applications. At present, the most common application for Kilopass NVM is security for conditional access, but for the future it will be for program storage.

WWJD: And why aren’t other versions of NVM secure?

Andre Hassan: Originally, memory was a discrete system component and even today many NVMs are used externally, with the most cost-effective being external NAND Flash. But anytime you have external memory, the data path is exposed. If you design with embedded memory, however, you avoid those issues. The memory becomes integral to the SoC.

WWJD: Are there downsides to NVM?

Andre Hassan: With any eFuse memory, the downside is that the bit cells are big. You can see the fuse with a simple microscope. With NVM ROM the vias or diffusion are used to create the bit cells. The storage area is very small, but the cycle to change the contents are economically high. Merged flash and logic processes offer good NVM density and programming cycle times, but have a high cost adder.

WWJD: All of this stuff is based on CMOS, but what’s going to happen when CMOS goes away. What’s going to happen when all the old guys giving keynotes today retire, those guys who say the change coming will happen after they retire?

Andre Hassan: I think CMOS will go on for another several process generations. CMOS continues to be the most cost effective foundational technology. I believe we will continues to innovate and solve problems we don’t yet know how to solve, even if we kill ourselves doing it.

WWJD: But still, what’s on the other side of CMOS?

Andre Hassan: New materials. New Science. Semiconductors have now evolved into very, very specialized fields. It’s time for people outside the industry on the material science side of things to say, I think there’s a new way to solve this scaling problem.

WWJD: Wally Rhines has a Ph.D. in Material Science. Will Mentor be the leader in all of this?

Andre Hassan: Wally will definitely have an influence in making it all go in the right direction. We always need senior leaders to foster investment in certain areas, but the real heavy lifting when it comes to breakthrough innovation will come from the scientists themselves.

WWJD: So what’s in your bucket list of improvements to make NVM better?

Andre Hassan: Any memory only has 3 metrics that can be put on 3 axes: Density, the number of bits per unit area you can build into a small area; Performance, how fast can you read and write to it; and Power.

On density, we’ve quadrupled our density with VCM with very cost-effective manufacturing requiring only a single mask and single implant step, a modification simpler and less expensive than adding an optional voltage threshold to the process.

On performance, we have more than doubled our performance over the last couple of years. A typical access time is 70 nanoseconds today, but we see that increasing to sub-40 nanoseconds as we move from specialty use to code storage.

From a power point of view, NVM has a tremendous advantage over volatile memory. Easy to explain, because SRAM has to be powered on to maintain the memory contents and DRAM has to be continuously refreshed.

NVM, on the other hand, you can power off and still maintain the memory contents, unless you are performing a Read or Write cycle, in which case you have to apply a little bit of power for access.

WWJD: Who’s the competition for what you’re advocating?

Andre Hassan: Most obvious is ROM, and that comes purely on cost. ROM is the least expensive NVM memory, but the biggest challenge for ROM is operational cycle time to change its contents.

The second competitor for operational flow is embedded fuses, but they are on the low end when the capacity is small. The competitive advantage of embedded fuse memory is cost. They’re like the ketchup at McDonald’s. It looks free, but is built into the cost of the burger.


News from Kilopass & SMIC …

January 30, 2013Kilopass Technology and SMIC today announced that Kilopass IP has successfully completed the JEDEC 3-lot qualification for the SMIC 65nm, 55nm and 40nm low-leakage CMOS process technologies.

Kilopass provides designers tamper-resistant, highly reliable NVM IP based on SMIC’s processes. JEDEC qualification assures designers that Kilopass IP used to store mixed-signal trim data, boot code, and security keys for application processors, MCUs and RF transceivers will guarantee operation and data retention for over 10 years.


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