Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.
SIP: Neither DAC nor DATE meets the need
January 10th, 2013 by Peggy Aycinena
EDAC’s January 7th MSS release details EDA/SIP earnings in Q3_2012, and attributes $423 million to SIP companies out of a total $1,620 billion for the combined industries. The same document cites EDA/SIP earnings in Q3_2011, and attributes $410 million to SIP companies out of a total $1,544 billion for the combined EDA/IP industries that EDAC represents.
In other words, and ironically, more than 25% of the revenues reported by the EDA Consortium’s Market Statistics Service are attributed to SIP companies, organizations who work in silicon intellectual property. And why is this ironic? Because if you thoroughly search both the DATE 2013 and DAC 2013 websites, you will find far less than 25% of the content there is dedicated to the topics of SIP, its development or utilization.
For instance, if you’re going to DATE in March in Grenoble and you’re interested in SIP, you can attend Special Session 2.8 on March 19th, “IP Subsystems: The next productivity wave?”. The session’s been organized by Synopsys’ Wido Kruijtzer and Politecnico di Torino’s Luciano Lavagno.
Session 2.8 includes a Synopsys presentation, “Modular SOC Integration with Subsystems: The Audio Subsystem Case”; a Tensilica presentation, “Configurability in IP Subsystems: Baseband Examples”; a Cadence presentation, “Configurable I/O Integration to Reduce SOC TTM: DDR, PCIE Examples”; and a presentation by Intel, “High-Performance Imaging Subsystems and Their Integration in Mobile Devices”.
This is all great stuff, but close inspection of the upcoming program at DATE indicates that Session 2.8 is it, the full extent of the content in Grenoble regarding SIP.
Meanwhile, if you’re going to DAC in June in Austin, trying to figure out what on the week-long program is related to SIP is a bit more of a challenge; the program’s not yet published. Nonetheless, it would appear by looking at the call for papers that no more than two sessions are full-on devoted to SIP: Session EDA 1.3, “IP and platform-based design”, and Session EDA 1.4, “Security and IP protection”.
Can’t tell you which day and hour in June during DAC week these 2 sessions will be happening, but they look to be the total of the full-on content specifically related to SIP in Austin. That’s it.
So you may disagree, but it does seem ironic that so little of these two major conferences, DATE and DAC, are devoted to SIP given the weight the revenue of these companies add to EDAC’s overall industry success numbers. Surely there are other conferences dedicated more directly to SIP [e.g. Design&Reuse sponsored IP/SOC], but it would be great to see more coverage at DATE and DAC, nonetheless.
“System-on-Chip integrators have to deal with more and more complexity during integration of their architectures. For cost and time-to-market reasons, SoCs tend to be architected as a set of coarse-grain subsystems for recognized system functions like audio, video, connectivity, modem, etc. Such subsystem solutions consist of multiple integrated hardware IP blocks together with associated software.
“Till recently IP subsystems were mostly adopted internally within SoC integrators and were not yet available from traditional IP companies. However, in 2012 multiple companies announced the availability of IP subsystem solutions. This special session will provide an update on the state-of-the art with regards to IP subsystems and review if IP subsystems indeed will be the way forward to boost productivity of SoC design.”
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