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Archive for the ‘DesignCon’ Category

IP Cuts Dynamic Power Dissipation 20% More Than Can Be Achieved With Standard Techniques

Tuesday, January 26th, 2016

CC-100 PowerOp IP 

The CC-100 PowerOp IP harvests waste energy (logic overlap current) in digital and mixed signal SOC’s, and recycles a portion of it back into the system for an overall lower system power profile.  This IP allows users to save watts of power, depending on how much digital or dynamic power is being consumed in a given SOC, and can fit in the left-over “white space” of most SOC or processor designs.

In short, this IP turns the standard power saving techniques around, saving power when circuits turn on, thus complimenting, not competing with, standard industry techniques normally used to save power.

The CC-100 PowerOp IP has been realized in Proof-of-Concept silicon and has been produced and characterized on the IBM CM018RF RF manufacturing process.

The CC-100 PowerOp IP import is scalable to any IC process ranging from .6um to 28nm, available on request from CurrentRF   Proof-of-concept, characterization, and design aid documents and boards for the CC-100 IP are also available on request.


USB used as an Analog-RF Port

Tuesday, January 26th, 2016

Most associate USB and it’s hardware as a digital and system data transfer protocol only.  Thinking of USB in terms of Analog and RF has only recently been a subject of interest in USB design, a necessity with the advent of USB 3 speeds and protocols.   In fact, RF effects become dominant in the data transfer speeds involved with in USB 3.    CurrentRF has developed a methodologies and technologies that allow server and network device USB ports, normally thought as digital and system data transfer ports, to be used as Analog/RF pickup ports for system noise and power reduction.

If one opens and ignores the data lines used for any flavor of USB, and focuses only on the resident +5V power and ground lines, one will see a rich source of RF frequencies of significant magnitude, that would enable energy harvesting techniques to be employed to recover this resident, generated energy.  In fact, if one utilizes an ac coupled spectrum analyzer of sufficient bandwidth, one will not only see frequency spikes and noise related to USB data transfers, but “coupled in” frequencies and noise energies related to other aspects of servers and network devices.


Silicon Valley veterans and experts accept young engineers as one of their own, at DesignCon, make them feel at home

Tuesday, February 5th, 2013

When I, a high school senior, got an invite to be a panelist at a panel discussion on “Engineering The Next Generation”, I was a bit surprised.  I aspire to be an electronics or a computer engineer, but have still not entered College.  My dad, Sunil Kakkar who founded a chip design and verification company SKAK Inc., serves on the technical program committee of DesignCon, told me that electronic design and semiconductor experts from all over the world will come to participate in the conference that will run for 4 days.  The conference would be a high tech affair, so I would have to be technical in presenting my thoughts.  I was somewhat apprehensive.  Will he be able to get their attention – I thought?   Could I speak on topics which will make sense to them?  What will their reaction be, on a high school senior fromCupertinoHigh Schoolparticipating in the DesignCon conference?


S2C: FPGA Base prototyping- Download white paper

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