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Archive for February 10th, 2016

We’ve Come a Long Way! (Part 2)

Wednesday, February 10th, 2016

If I say ‘sticks’ to you, what comes to mind? Well, you could reply with “bits of wood” or “an American rock band from the 70’s” or “a river in Hades” and you would be correct. However, when you ask the question in the context of EDA, well, that’s a different story.

‘STICKS’ or ‘stick diagrams’ refers to a technology called symbolic layout. My first introduction to symbolic layout was the CALMA STICKS package that emerged around 1983.

STICKS was a netlist-driven symbolic design package that produced correct-by-construction physical layout directly from the logical netlist. Although a great concept, it never really took off. The effort to bring the logical connectivity into the layout by means of a netlist did not deliver a high-enough ROI in the eyes of the layout community.

DownStream: Solutions for Post Processing PCB Designs
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: UltraPLL

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