Posts Tagged ‘eda industry’
Wednesday, December 11th, 2013
 Here at the Aldec corporate office, we have a sign that reminds us all of our mission in the field of Technology. It reads, ‘To deliver solutions that provide the highest productivity to value ratio; supporting our existing products while delivering innovation to current and new technologies’. We have similar statements to reaffirm our commitment in the areas of Research, Alliances, and Culture – we call it our “Aldec DNA”.
 Because we genuinely want to have a clear understanding of our user’s requirements and methodology preferences, we continually engage in surveys and interviews. The knowledge we gain better positions us to support our existing products and to deliver that support where it matters the most to our users. If you’ve ever had that frustrating experience where your favorite tool no longer supports your methodology of choice – then you understand why this is so important.
Our Commitment to the VHDL Community
When it comes to VHDL-2008, we have learned from our customers that many are happy using the methodology – and continue to successfully deliver cutting-edge technology with it. So, while we remain committed to delivering innovation to new technologies, our R&D teams also invest a great deal of development time to ensure that Aldec solutions continue to offer a high level of support for popular languages like VHDL.
For the rest of this article, visit the Aldec Design and Verification Blog.
Tags: Active-HDL, advanced verification platform, Aldec, aldec design rule checker, aldec dna, aldec simulators, alint, bitvis, do-254/ed-80 vhdl rule plug-ins, eda industry, embedded psl, FPGA Design, functional coverage, HDL, highest productivity to value ratio, ieee, ieee 1076-1993 Standard, ieee 1076-2002 vhdl standard, ieee 1076-2008 standard, ieee standard, ieee vhdl, intelligent testbench methodology, open source vhdl verification methodology, osvvm, psl embedded in vhdl, randomization, Riviera-PRO, simulation, source encryption, standards, starc vhdl, vector implementation of integer arithmetic, verification, VHDL, vhdl community, vhdl designs, vhdl testbench, vhpi interfacing to C/C++ code
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Monday, July 22nd, 2013
 To Accelerate DSP Design Development
If we’re being honest, human beings, especially engineers, are lazy. Let’s face it, most inventions ever made were created for the sole purpose of making our lives easier. The same goes for the manner in which we create our designs. In the not so distant past, engineers were drawing designs by hand on huge trace paper, placing them one below the other to form layers. This sounds like hard work to me! The lazy me would have wanted a smart (read: easy) solution to this process. Then along comes the EDA industry, which Aldec has been part of since 1984, making it much easier for us to do our designs.
Some might argue that EDA was born out not out of laziness, but in fact neccessity, due to increasing design complexity. True, it is impossible to imagine how the pencil and paper method could even work today. The point is it didn’t, and we now have automated the process to such an extent all you need do is enter some parameters in a tool wizard.
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Tags: accelerate dsp design development, Aldec, co-simulation, data analysis, data visualization, debugging, design, dsp algorithm, eda industry, edif cells, hdl code, hdl simulator, matlab, Riviera-PRO, simulink, verification, verilog modules, vhdl entities
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Here at the Aldec corporate office, we have a sign that reminds us all of our mission in the field of Technology. It reads, ‘To deliver solutions that provide the highest productivity to value ratio; supporting our existing products while delivering innovation to current and new technologies’. We have similar statements to reaffirm our commitment in the areas of Research, Alliances, and Culture – we call it our “Aldec DNA”.
Because we genuinely want to have a clear understanding of our user’s requirements and methodology preferences, we continually engage in surveys and interviews. The knowledge we gain better positions us to support our existing products and to deliver that support where it matters the most to our users. If you’ve ever had that frustrating experience where your favorite tool no longer supports your methodology of choice – then you understand why this is so important.
