June 09, 2008
Elastix Clocks Reduce Margins. Landing in Barcelona.
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Jack Horgan - Contributing Editor

by Jack Horgan - Contributing Editor
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Elastix is an early-stage EDA company developing innovative technologies to enable variability-aware designs and optimize power-performance trade-offs for 65nm and beyond technologies. Their technology of elastic clocks enables designers to reduce performance and power margins. The technology comes out of the Barcelona area which has an innovative incubator program. I had an opportunity to talk about the technology, the company and the Landing program with CEO Vigyan Singhai and Engineing VP Emre Tuncer.

Would you provide us with a brief biography?

My name is Vigyan Singhai. I am CEO of Elastix. Along with Emre (Emre Tuncer VP of Engineering) and Jordi (Jordi Cortadella, Chief Scientist) I founded the company. I got my Ph.D. degree in logic synthesis and verification at UC Berkley under the guidance of Professor After that I joined Cadence for a few years. After Cadence I founded Jasper Design Automation where I was CEO for the first three years until the day of the second round financing. I stayed at Jasper for a few more years. I left to start a design verification and IC company called Oski Technology. In 2006 I was introduced to the idea of elastic clocks by Jordi Cortadella who is our CTO and Luciano Lavagno. These two guys are
the inventors of the technology. The idea was very intriguing to me. It promised a lot of performance and power gains. I did a lot of due diligence, tried to understand the potential of the technology as well as the market opportunity by talking to a few potential customers. Once I was convinced I left my business to jump into this full time at the end of 2006.

A brief biography from you also, Emre.

I started my professional career in EDA in southern California. After finishing my Ph.D. at the University of Texas at Austin I moved to Camarillo and joined Quad Design. At the time it was a subsidiary of View Logic. I was there for two years, mostly on signal integrity. We developed a prototype of our own chip signal integrity tools and for the customers too. About two years later I moved to the Bay Area to Monterey Design Systems. At the end of 2002 I left Monterey and went to Magma. My first responsibility at Magma was for engineering. In the subsequent years I held VP of Engineering and Chief Technologist positions. About a year ago I joined Elastix. I have been working on the product
ever since.

Emre: What caused you to leave Magma which has been doing very well to join a new startup?

I got the startup fever when I joined Monterey. I was one of the initial people there. Then I joined Magma. I saw Magma growing up from when I joined it was around 100 to 200 people to over 800 people when I left. What I wanted to do was take a new idea, a new technology, from scratch and bring it to the user domain and make it a product. I met with Vigyan. After numerous discussions I realized that this was the right technology. It is the right technology in the sense that it is not disruptive but the benefits it provides are much higher than the things you need to adopt the technology.

How did you (Vigyan) learn about the technology?

I was introduced to this by Luciano Lavagno who I have worked with for many, many years. He got his Ph.D. at UC Berkley, was at Cadence and is also Professor at Polytechnico de Torino… right now. He was one of the inventors of this technology. He introduced this idea to me a couple of years ago. Since then I have been working on this. These guys have been working on this technology for about 10 years now.

Where were they working?

At universities. Luciano Professor at Politecnico de Torino in Italy and Jordi Professor at Barcelona. They also had a couple of other researchers. One guy was from Cadence and worked at Philips.

Did you bankroll the company or did you get outside funding?

Initially we funded the company on sweat labor. Then we got a big investment from an angle investor last year. Today we are raising additional funds.

If I understand correctly Elastix has one foot in Silicon Valley and one foot in Barcelona.

The city of Barcelona had adopted a lot of initiatives to bring in new companies. There is a section inside Barcelona, called the 22nd district, which is a vision of creating a compact city where one can live, work and play. It is kind of like a sub-city inside Barcelona. They have the Landing Program which provides an infrastructure to get a firm up to speed in all the issues such as legal, accounting, employment, and getting office space. We had no experience before in starting and building a business in Barcelona. The partnership with that program has been extremely kind and fruitful for us because without their help for us to go there and start this business would have been
very difficult. It is an ideal environment to have from the perspective of a foreign company which is landing in Barcelona. The district itself envisions itself becoming a business landing zone for international companies. It pretty much represents what Elastix is. We are in Barcelona because Jordi has been there for many years. He has a lot of contacts, academic contacts; his ex-students, resource into a pool of people we can tap into. But we did not have the business contacts. For that the Landing Program has been extremely helpful.

Are there any other EDA or semiconductor companies in Barcelona?

That is the interesting thing about Barcelona. The economy is strong there in a lot of industries like telecommunications, oil and gas, finance, electronics and high tech. There has not been a concentration of large companies but new companies are coming up. There are semiconductor companies like DS2 which is a well funded company. Barcelona Design Systems was named because the founder was from the city of Barcelona but it had no operations there. We can take advantage of the talent right in the city itself.

Editor: Dr. Mar Hershenson was a founder of Barcelona Design. More recently she was CEO of Sabio Labs which was recently acquired by Magma.

What was the problem that the technology was trying to solve?

The way I look at it, we had a vision of building a large complex chip without sacrificing significant performance and power margins. What has been happening for many, many years is that we were throwing away large margins because the only way we knew to do design was to do worse case design, sacrificing significant variations in margins from the typical design points. Today in the face of increasing low power requirements we are forced to deal with variability. With our technology we embrace variability and let the design run at their natural power and performance which is significantly lower than how chips are designed and manufactured today. That’s the opportunity. People
are doing all sorts of things to manage power, control power, minimize power requirements both in the design of blocks as well as in the design of interconnect. There is a rise in adoption of aggressive voltage scaling techniques. That is prompting people to think about variation, off chip variation, timing analysis and physical design. It was the right time for the technology to come about. It was a natural and easy answer to a lot of those issues.

What is the source of this variability?

Variability in design is there. Some people say it is increasing, others say it is the same. The sources are different. There are the obvious manufacturing sources. Different devices on the same chip may have variations for manufacturing reasons. On the same wafer they may have different performance. Of course different wafers form the same fab or from different fabs, even with exactly the same design and process and so on. Similarly there are environmental variations because of changes in supply voltage, temperature. In addition to all that there are also data variations. Under different logical input conditions the same design or the same block may run in different amounts of
time. We can take advantage of all those variations. You do not have to worse-case all the variations all of the time and sacrifice or throw away significant timing or power.

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-- Jack Horgan, EDACafe.com Contributing Editor.


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