Cadence Design Systems, Inc. (
Cadence is demonstrating design and verification IP that enable the successful integration of flash memory technology into ASICs and SOCs. Combining technology from both Cadence and the Denali acquisition, the company's comprehensive offering enables the rapid deployment of systems for storage, enterprise and networking applications.
- Flash memory controller solutions
- Advanced low-density parity check (LDPC) error correction technology
- Host system interfaces including PCI Express solutions
- Hardware/software integration solutions including verification IP ( VIP) and memory models
The company will also participate in two sessions:
- Session 302: "Non-volatile Design Practices and Methodologies." Moderated by Bob Pierce, senior technical marketing manager, SoC Realization at Cadence, the panel will look at architectural and design challenges associated with delivering SSD products. Specifically, the session will explore using multiple interfaces that offer higher IOPs (input/output operations per second). Additional topics include CPU challenges and system-level design aspects associated with using FPGAs.
- Session 307: "PCIe Storage 2." Ashwin Matta, engineering director, SoC Realization, at Cadence, will present on an implementation of the PCIe Gen3 specification, with features targeted at maximizing flexibility and performance of data access within a storage subsystem.
Wednesday, August 10, Noon - 2 p.m. and 5:30 - 7 p.m.
Thursday, August 11, Noon - 2 p.m.
Non-volatile Design Practices and Methodologies
Thursday, August 11, 8:30 - 9:40 a.m.
PCIe Storage 2
Thursday, August 11, 2 - 3:15 p.m.
The Flash Memory Summit is being held at the Santa Clara Convention Center in Santa Clara, CA. Demonstrations will take place in the Cadence Booth #206. Sessions will take place in the convention center conference rooms.
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
Media contact: Joany Draeger Cadence Design Systems Email Contact 408-428-5220