New Application Note Addresses Challenges in Integration and Parameterization of EM Simulation Within a High-Frequency Circuit Design Flow

EL SEGUNDO, CA. Oct. 17, 2017 -- The ability to incorporate multiple EM simulators into one circuit design environment has the obvious advantage of decreased setup time and reduced chance of setup error, which shortens design cycles. A new application note, Overcoming Challenges in Integration and Parameterization of EM Simulation Within a High-Frequency Circuit Design Flow, examines the challenges associated with EM simulation within a high-frequency design flow and shows how NI AWR Design Environment, in particular its EM Socket™ architecture, helps address these issues.

The application note covers topics such as process technologies, hierarchy, ports and boundaries, 3D and PDK (library) cells and shape pre-processing, as well as meshing techniques.


The application note can be downloaded at



AWR, AWR Design Environment, National Instruments, NI and are trademarks of National Instruments. Other product and company names listed are trademarks or trade names of their respective companies.

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