In addition, the tool helps to address the issue on how to match FPGA signals to nets on a PCB board where an FPGA device is placed. This is a common problem when an FPGA Designer and PCB Designer are working together on a design. To help with the solution, E-Builder supports all major FPGA device families, FPGA constraints formats and rules-driven comparison wizard. The combined functionality allows FPGA symbols to be built with pins having signal names correspondent to PCB net names on a board.
Now CAD Librarians, Engineers in the front end as well as FPGA Designers will have an easy to use tool that will allow them to generate intelligent high pin count symbols in a matter of minutes with automatic placement on a page when needed. The tool supports TCL scripting to allow the building of symbols to be even more efficient.
More information about E-Builder can be found at Elgris web site.
About Elgris Technologies, Inc ( www.elgris.com):
Elgris Technologies, Inc. is a provider of schematic/netlist visualization and schematic/netlist translation solutions. Elgris brings high quality schematic/netlist debugging products, tools to generate intelligent Adobe PDF, CAD schematics and intelligent high pin count symbols, world-class translators that simplify the tasks of integrating, migrating, and archiving design data from various EDA platforms. Elgris customers include Semiconductor companies, Test and Repair companies, Electronic Manufacturing Services (EMS) companies, original EDA tool manufacturers (OEM). Elgris Technologies headquarters is located in Santa Rosa, California.
Elgris Technologies, Inc.
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