Aselta Nanographics offers optimized dataprep flow for Mapper’s maskless lithography system

Grenoble, 21 February 2014 ---- Aselta offers a data preparation solution for Mapper’s massively parallel electron beam writer optimizing the best combination of resolution, pattern fidelity and writing time.

Aselta, a supplier of advanced data preparation software solutions, and Mapper Lithography,a supplier of electron-lithography equipment for the semiconductor industry, today announced a partnership to provide an Aselta option for Mapper’s FLX:1200 system, based on its Matrix platform. A joint program has allowed Aselta and Mapper to develop an optimized data preparation flow for geometries from 90 nm down to 14 nmnodes.

The challenge of advanced multi-beam writers, especially at 20nm and below, is to find the optimal trade-off between wafer pattern fidelity which drives yield and writing time which ultimately drives cost. The solution for the Mapper’s writer is based on Aselta technology, Inscale™, which correction algorithms provide a unique combination, allowing customers to reduce cost while augmenting quality.

The software flow features a dedicated proximity effect correction, a simulation and analysis capability and a model-based verification engine fully interfaced with the oasis.mapper format.

A complete FLX:1200 emulator has been implemented in order to mimic the pixelated data handling through the full data path. Simulation inside Inscale is achievable pixel-wise with a bitmap repartition identical to the final multi-beam exposure.

On top, several software modules have been implemented like rasterization and dose mitigation. A new SmartBoundary scheme is adapted to Mapper’s data format to minimize alignment and stitching errors.

Mapper and Aselta will be presenting at the SPIE Advanced Lithography Conference 2014 a paper called “Demonstration of EDA flow for massively parallel e-beam lithography” showing the latest results combining usage of Inscale model-based dataprep on Mapper’s multibeam system.

"Mapper and Aselta are joining forces for this new multi-beam direct write market. We have looked at Aselta technology, and believe the Inscale software solution does a good job performing the necessary dataprep task before feeding design data into our machine” said Marco Wieland, Mapper’s CTO and co-founder.

"This partnership is a perfect example of how companies can build the multibeam direct write ecosystem," stated Serdar Manakli, Chairman and CEO of Aselta. "Aselta has been working with Mapper to understand its equipment specifics and to tune Inscale to get the optimal combination of both worlds”

About Mapper Lithography.

MAPPER Lithography, based in Delft, The Netherlands, and founded out of Delft University of Technology, is developing a groundbreaking maskless lithography infrastructure for the semiconductor industry. Its tools utilize an innovative multiple e-beam technology with which next generation semiconductors can be manufactured in a more cost effective fashion. It makes the traditionally used mask redundant and combines high resolution and high productivity. MAPPER employs over 220 people.

For further information, please visit: www.mapperlithography.com

About ASELTA

ASELTA is a VC funded French company providing software environment mostly for the e-beam market. A CEA-LETI spin-off, incorporated in November 2009, ASELTA has production customers benefiting from its technology. Its unique architecture allows customers to increase resolution, accuracy and reduce writing time for their e-beam equipment with a seamless plug-and-play environment. Its corporate headquarter is located at Minatec BHT - 7, parvis Louis Néel, 38040 Grenoble cedex 9 - France

For further information, see: www.aselta.com


Contact:

Christophe Guittard
Tel: +33 6 19 41 77 62
Email: christophe.guittard@aselta.com




Review Article Be the first to review this article
Aldec

Featured Video
Jobs
Senior Electrical Engineer for Allen & Shariff Corporation at Pittsburgh, Pennsylvania
Upcoming Events
Methodics User Group Meeting at Maxim Integrated 160 Rio Robles San Jose CA - Jun 5 - 6, 2018
2018 FLEX Korea at Room 402/ 403, COEX Seoul Korea (South) - Jun 20 - 21, 2018
DAC 2018 at Moscone Center West San Francisco CA - Jun 24 - 28, 2018
IEEE 5G World FOrum at 5101 Great America Parkway Santa Clara CA - Jul 9 - 11, 2018
DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: IoTPLL
DAC2018



Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise