All Categories : Technical Papers Bookmark and Share

Title : STIL Verifier: Post-Silicon Functional Test Automation within Cadence Incisive
Company : Globetech Solutions
Date : 26-Jul-2011
Downloads : 3

Rate This File
5 Stars
4 Stars
3 Stars
2 Stars
1 Star

Earlier this year, Globetech Solutions announced STIL Verifier, the industry’s fastest route from functional verification to functional silicon test and debug. STIL Verifier aims at extending verification capabilities into the post-silicon validation domain. Its goal is also to leverage verification environment constructs, process data, and design knowledge to increase effectiveness and reduce cost during debug, validation, and volume test of semiconductor devices.
User Reviews More Reviews Review This File
Looking at STIL - stevebr - Report As Inappropriate
Aldec

ClioSoft at DAC

Featured Video
Jobs
Senior Electrical Engineer for Allen & Shariff Corporation at Pittsburgh, Pennsylvania
Upcoming Events
DAC 2018 at Moscone Center West San Francisco CA - Jun 24 - 28, 2018
Symposium on Counterfeit Parts and Materials 2018 at College Park Marriott Hotel & Conference Center MD - Jun 26 - 28, 2018
Concar Expo 2018 at Convention Hall II Sonnenallee 225 Berlin Germany - Jun 27 - 28, 2018
Nanotech 2019 at Tokyo Big Sight East Halls 4-6 & Conference Tower Tokyo Japan - Jun 30 - 1, 2018
ClioSoft at DAC
Altair
TrueCircuits: IoTPLL



Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise