5.3  Altera FLEX

Figure 5.10 shows the basic logic cell, a Logic Element ( LE ), that Altera uses in its FLEX 8000 series of FPGAs. Apart from the cascade logic (which is slightly simpler in the FLEX LE) the FLEX cell resembles the XC5200 LC architecture shown in Figure 5.8 . This is not surprising since both architectures are based on the same SRAM programming technology. The FLEX LE uses a four-input LUT, a flip-flop, cascade logic, and carry logic. Eight LEs are stacked to form a Logic Array Block (the same term as used in the MAX series, but with a different meaning).


FIGURE 5.10  The Altera FLEX architecture. (a) Chip floorplan. (b) LAB (Logic Array Block). (c) Details of the LE (Logic Element). ( Source: Altera (adapted with permission).)

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DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: UltraPLL

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