By Mike Eftimakis, VP Strategy and Ecosystem, Codasip
In 2025, CHERI (Capability Hardware Enhanced RISC Instructions) is set to make waves in the tech industry. Its integration into the RISC-V standard is already underway, with ratification expected within the year. This development will cement CHERI’s role in advancing hardware-enforced memory safety, a critical step in combating modern cybersecurity threats. Governments are also poised to mandate memory safety standards across the electronics and high-tech industries, driving a shift toward more secure hardware. As CHERI-enabled chips are expected to hit the market, 2025 could mark a turning point in building a safer, more resilient digital future for everyone.
This is not a day too soon, the need for robust cybersecurity has never been more pressing. In fact, the cost of cybercrime globally is comparable to being the third biggest economy in the world. As businesses and individuals rely more on digital platforms, the risks associated with cyberattacks keep escalating dramatically. The rapid adoption of AI also brings new threats that will escalate this even further, unless governments and industry swiftly adopt effective countermeasures.
Building on over a decade of pioneering research by the University of Cambridge and SRI International, CHERI technology has matured and reached a tipping point where general use becomes possible. CHERI provides the robustness needed to address unexpected software defects and memory vulnerabilities, which would otherwise enable cyberattacks that target memory misuse. These are the most common attacks, which each year represent around 70% of newly detected software vulnerabilities.
