EDPS 2017: After changes, Hidden Gem no longer

Of all of the EDA-related conferences that have taken place over the years, one of the very best has probably been one of the least well-known.

EDPS – the Electronic Design Process Symposium – has been held for the last 24 years in the spring in Monterey. The beloved destination of the late, great Gary Smith, EDPS has been host to some of the most informed conversations, esteemed speakers, and highest caliber content in EDA. Ever.

And now – proving that it actually is possible to improve Best in Class – the organizers of EDPS have made two radical changes, changes that will have far-reaching impact for the conference and its excellent content.

For the first time this year, EDPS is going to be in Milpitas, not 2 hours south in Monterey, and the conference is going to be happening in September, not April.

This is great news. Now people who live and work in Silicon Valley can more easily access the 2-day program and can more readily partake of the content. And those flying in from out-of-town can get to the conference venue more quickly without a long, strenuous drive to the coast.

Speaking of content, this year’s conference – set to unfold on Thursday and Friday, September 21st and September 22nd – will address the following topics:

* System-Level Design
* Synthesis for High-Level Design
* Big Data & Machine Learning for EDA
* Data-centric Computer Architecture

* The Cognitive Age [keynote]

* Eco Systems for Design & Test
* Accelerating SoC Validation & Debug
* Security versus Debug

* SiP Technology
* Manufacturing Issues
* EUV
* Die Yield & Post-Silicon Analytics

In other words, everything including the kitchen sink related to the design and manufacturing of ICs.

Clearly if you know that focused, complex, difficult, and compelling content is what makes it worthwhile to attend a conference, and you want to be able to discuss all of that in a small, conversational atmosphere graced with enough time to actually hash through the controversial parts, then attending EDPS is a given.

A conclusion made even more obvious when you read the list of speakers set to present at this year’s conference in September.

Shishpal Rawat, CEDA
Antun Domic, Synopsys
Naresh Sehgal, Intel
Rajesh Gupta, UC San Diego

John Lee, Ansys GM & VP
CP Hung, ASE
Bill Bottoms, Third Millennium Test Solutions
Zoe Conroy, Cisco

Herb Reiter, EDA 2 ASIC
Ron Leckie, Infrastructure Advisors
Keith Arnold, PDF Solutions
Asim Salim, Open Silicon

Gerard John, Amkor
Juan Rey, Mentor
John Swan, Intel
Priyadarsan Patra, Intel

Gajinder Panesar, UltraSoC
Eduardo Bolanos, Intel
Al Czamara, Test Evolution
Vikas Kumar, Intel

Jim Hogan, Vista Ventures
Pankaj Mehra, Western Digital
Aparna Dey, Cadence
Paul Franzon, North Carolina State University

David White, Cadence
Rob Aitken, ARM
Jeff Dyck, Solido Design Automation
Abhijit Chatterjee, Georgia Tech

Javi DeLa Cruz, Invensas
Dan Jeung, Open Silicon
Derek Floyd, Advantest

Imagine having a chance to listen to these guys lecture on their area of expertise and having the chance to quiz them in detail right afterwards, and you’ll know what EDPS is all about: Education. Information. Conversation. Controversy. Conclusion.

This conference is really a remarkable event and now that it will be housed in Silicon Valley, happily it will be a hidden gem no longer.

Register for EDPS 2017 here, and be there or be square.

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Editor’s note …

It’s interesting to note that not a single speaker this year included the term IoT in their presentation title. Has the industry already moved on?

It’s also worth mentioning that the beautiful Pacific Coast is exactly why Gary Smith loved EDPS. Clearly the opportunity to enjoy those vistas will be sorely missed by long-time EDPS devotees.

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Tags: EDPS, Electronic Design Process Symposium, Gary Smith, Shishpal Rawat

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