Dr. Rhines: EDA’s charm & intelligence reflected in Q4_2014
April 13th, 2015 by Peggy Aycinena
Quarterly, as many of you know, the Market Statistics Service of the EDA Consortium reports out on the health of the industry. Quarterly, as well, Mentor CEO Dr. Walden Rhines makes himself available to the Press, to comment and elaborate on the EDAC results.
And so it was last Friday that I had a chance, yet again, to speak by phone with Rhines, always a conversation to look forward to. If you want to know how the EDA industry did in Q4_2014, you can scroll to the bottom of this blog. If you want to read a paraphrased snapshot of a wide-ranging discussion with Wally Rhines, however, it follows here.
WWJD – This debriefing thing must be quite tedious. How’s it going, and how’s EDA doing?
Rhines – This is only my second Press meeting, so not bad. The EDA industry [booked] record revenues for the fourth quarter of 2014, and the entire year, and showed a substantially higher rate of return than the semiconductor industry. The industry’s doing very well, with hiring up 6 percent on the year, and strong reporting from companies in IP and physical design and verification. There is some weakness in the numbers out of Japan, but they were offset by strong results in the PacRim and the Americas.
WWJD – Why are things weak in Japan?
Rhines – I just get the numbers, but it’s fair to speculate that we’re still in the process of absorbing some really disruptive changes in the Japanese semiconductor business.
WWJD – What are those disruptive changes?
Rhines – Company consolidations, bankruptcies, system companies that have phased down their IC design business, the outsourcing of foundries, some loss of market share in consumer electronics, partly to Korea and China. A lot of these things have put pressure on Japan. [The situation] may be alleviated with the semi-revaluation of the Yen, but these things take a lot of time.
The Yen was quite strong relative to U.S. and European currencies for quite some time, which made it hard for semiconductor manufacturing in Japan to be competitive around the world. Re-adjusting currencies may start to improve things, but EDA tends to be a lagging indicator, because you don’t step up your design activities just before investments.
WWJD – In many keynotes you’ve made the point that when the semiconductor industry cycles down, EDA cycles up. But you also always seem to say, when semiconductor cycles up, EDA also cycles up. How can that be?
Rhines – [chuckling] I have taken a lot of time over the years to look at EDA revenue growth, especially over the last 10 or 15 years. Through that, we’ve discovered that EDA tends to lag any downturn in the semiconductor industry, and the upturns, and finally we found an explanation.
When there’s a downturn in the semiconductor industry, you start to cut expenses, but design is the last expense you cut and for good reason. You can shut down a factory or cut back on administrative support and recover [those capabilities] later on. But it’s very hard to stop doing design, because you always know any recession will be over someday. You can turn manufacturing on and off, but you can’t turn design on and off. [Having said that], the 2008 recession showed things were going to be very bad, so then the downturn even affected design to a certain extent. The industry has recovered, however.
As you may know [chuckling], I have a run a semiconductor company at least once in the past, and we know that even when revenue recovers you’ve still got R&D at way too high a percentage of revenue. Then you must prevent your R&D budget from growing, even though you’re being bombarded by engineers for more design tools, because you can’t [increase R&D] until the operating metrics get back to normal.
WWJD – So again, whether semiconductor is up or semiconductor is down, EDA is always up?
Rhines – [chuckling] What you’ve probably heard me say is that when semiconductor is up, EDA is up. When semiconductor is down, then I expect EDA to be down as well, but the amplitude of the up and down differs.
EDA is highly damped compared to the semiconductor industry. A swing of 20-to-30 percentage points in a single year for semiconductors [translates] into only 1-to-3 percent in EDA over most of the history of the industry.
Let me also note that in a broad sense, almost 80 percent of the revenue in EDA is for designing ICs, so EDA can never grow much faster than semiconductors in the long-term. The reason is, the semiconductor budgets remain a constant percentage of EDA revenues and R&D comes out of that budget. So for the very long-term, look for EDA to grow modestly faster, but not much faster, than the semiconductor industry.
WWJD – You gave a marvelous, content-rich talk that covered these issues at EDPS in Monterey last year. Why isn’t that talk on the schedule for a larger audience at the upcoming DAC in June?
Rhines – It may have been heard at EDPS, but it was not an invited talk at DAC. [chuckling]
WWJD – About 10 years ago, a well-known leader in EDA made a somewhat patronizing comment to me during an interview. Something like, ‘I have let our Chinese colleagues know how proud I am of the progress they’re making in the quality of their work in chip design.’ Has the sophistication of design in China moved beyond the level of that comment. Where are the ‘less sophisticated’ designs being done today?
Rhines – There’s always a moving frontier for the adoption of technology, and in other industries as well. You could mark such a moving frontier with the manufacturing of textiles, for instance – the U.S., then Hong Kong, then Thailand, then Bangladesh. These places have all seen the level of advanced manufacturing in textiles make its way around the world.
What you’re really asking is, doesn’t the level of advanced IC design do the same thing? And if so, where is that frontier today, and where might it go? You’re asking where are the lagging-edge designs being done today? Where are the design centers that are not leading-edge, but are set up for low-cost reasons or because of the availability of skilled labor?
Well, there are many new ones in Vietnam, and to some extent Thailand, as well. And there are [lagging-edge] design centers in parts of India that have not been involved in technology before, so it’s always a moving target.
Clearly, China is more sophisticated today than it was 10 years ago and any sort of patronizing comment would be wrong. There are lots of sophisticated designers in China, and large investments going on to make China a more and more important force in the semiconductor industry. Their share [of the EDA market] is still less than 10-percent of sales, but their consumption of semiconductors is enormous. Admittedly, a lot is for export, but they are the largest consumer of semiconductors in the world.
And their manufacturing capability is going to close the gap. I fully expect China to be every much a leading competitor as any other country, including Japan.
In the 1980s, we talked about competing effectively against Japan and, in fact, Japan got to the leading edge. Now it’s China, but there is a lot of the world left to go, with continued dynamic growth that’s only limited by the availability of people who are educated, or can be educated, to perform the tasks. And the availability of those who have the creativity and imagination to dream up the products. That’s why over the last several years, PacRim has seen almost 100 percent of the growth in EDA sales.
WWJD – On a different front, DFM used to be such a hot topic. Now that 3-letter obsession has been replaced by another one, IoT. What happened to poor DFM?
Rhines – Yes, it was a hot new growth area 5 years ago, but now it is mainstream. Everybody has to use DFM tools to get their designs released. And no, it’s not just a push-button thing, but a key part of the engineering of a design. If you look at the numbers, DFM over the last 10 years has added more revenue to everything except IP. DFM is still a substantial growth area.
Interestingly this week, I gave a talk in Asia at a memory group meeting, and there I found that DFM has taken on a new level of excitement. When logic designers were adopting DFM [some years back], memory designers could get away with much less analysis because of the regularity of their designs. They were not dealing with leads going this way and that.
But now because of shrinking design rules, DFM has become critical for memory designers. It was the single hottest topic at the half-day conference I attended this week. Previously memory people were not used to worrying about DFM.
WWJD – Shouldn’t all design engineers be interesting in the manufacturabilty of what they’re designing. Shouldn’t they all be excited about DFM tools?
Rhines – The real challenge in DFM, and other similar things, is in the organization. It’s in the fact that the work and the reward for that work are frequently separated.
A designer is designing chips and trying to meet performance and power parameters, while the manufacturing engineer is trying to get good yields with difficult process nodes. The design engineer is being measured on meeting schedules and power/performance metrics, but the manufacturing engineer’s success is being measured on yield and throughput.
Frequently, the manufacturing people have their hands tied. When things don’t go well, they can only point fingers at the designers and say the problems are their fault. With a little bit of work on the part of the design engineer, however, great things could be added to the results for the manufacturing engineer.
So the idea of slipping DFM tools into the design flow may be a good one, but if the tools don’t make it easy to implement changes into the design and give measurable results, [little effort will be made] to use them. And it’s still a problem whenever a task in an organization, and the reward for that task, go to two different groups. It causes a disconnect.
The only way to improve things is for the designers to see that this design is more manufacturable than the other, which requires modern DFM tools. Improvement requires a way to bridge the gap, so the front-end engineer can be measured not just on performance and schedule, but also on the predicted yield at sign-off.
WWJD – Cash bonuses for designers who meet certain manufacturability metrics?
Rhines – Smart companies always find ways to reward people based on what creates success for the company. They have a way to factor into the compensation the ability of the company to succeed.
WWJD – Okay, growth in EDA? How do we do it?
Rhines – As always, growth will come from solving new problems and finding new applications for the intelligence and charm of design automation. That’s been the case historically, and I see that trend continuing on into the future.
SAN JOSE, Calif., April 13, 2015 – The EDA Consortium (EDAC) Market Statistics Service (MSS) today announced that the Electronic Design Automation (EDA) industry revenue increased 11.9 percent for Q4 2014 to a record $2104 million, compared to $1880.5 million in Q4 2013. Sequential EDA revenue for Q4 2014 increased 15.1 percent compared to Q3 2014, while the four-quarters moving average, which compares the most recent four quarters to the prior four quarters, increased by 7.3 percent.
“The fourth quarter revenue represents both a record quarter and the culmination of a record year for the EDA industry,” said Walden C. Rhines, board sponsor for the EDAC MSS and chairman and CEO of Mentor Graphics. “IC Physical Design and Semiconductor IP both reported double-digit growth in Q4. Geographically, the Americas as well as Asia-Pacific had record quarters with double-digit growth in those regions.”
Companies that were tracked employed a record 31,735 professionals in Q4 2014, an increase 6.2 percent compared to the 29,880 people employed in Q4 2013, and up 0.3 percent compared to Q3, 2014.
The complete, quarterly MSS report, containing detailed revenue information broken out by both categories and geographic regions, is available to members of the EDA Consortium.
Revenue by Product Category
The largest category, Computer Aided Engineering (CAE), generated revenue of $699.5 million in Q4 2014, which represents a 3.1 percent decrease compared to Q4 2013. The four-quarters moving average for CAE decreased 1.3 percent.
IC Physical Design & Verification revenue was $483.7 million in Q4 2014, a 25.9 percent increase compared to Q4 2013. The four-quarters moving average increased 4.7 percent.
Printed Circuit Board and Multi-Chip Module (PCB & MCM) revenue of $176.2 million for Q4 2014 represents a decrease of 7.6 percent compared to Q4 2013. The four-quarters moving average for PCB & MCM increased 5.1 percent.
Semiconductor Intellectual Property (SIP) revenue totaled $642.8 million in Q4 2014, a 32 percent increase compared to Q4 2013. The four-quarters moving average increased 22.1 percent.
Services revenue was $101.6 million in Q4 2014, an increase of 4.9 percent compared to Q4 2013. The four-quarters moving average increased 6.1 percent.
Revenue by Region
The Americas, EDA’s largest region, purchased $935.4 million of EDA products and services in Q4 2014, an increase of 13.8 percent compared to Q4 2013. The four-quarters moving average for the Americas increased 10.4 percent.
Revenue in Europe, the Middle East, and Africa (EMEA) was flat in Q4 2014 compared to Q4 2013 on revenues of $328.9 million. The EMEA four-quarters moving average increased 3.6 percent.
Fourth quarter 2014 revenue from Japan decreased 19.5 percent to $206.8 million compared to Q4 2013. The four-quarters moving average for Japan decreased 17.8 percent.
The Asia/Pacific (APAC) region revenue increased to $632.9 million in Q4 2014, an increase of 33.9 percent compared to the fourth quarter of 2013. The four-quarters moving average increased 18 percent.
The complete MSS report, available to the EDA Consortium members, contains additional detail for countries in the Asia/Pacific region.
Tags: DFM, EDAC, MSS, Wally Rhines